An Improved Diffusion Based Placement Algorithm for Reducing Interconnect Demand in Congested Regions of FPGAs
Joint Authors
Source
International Journal of Reconfigurable Computing
Issue
Vol. 2015, Issue 2015 (31 Dec. 2015), pp.1-10, 10 p.
Publisher
Hindawi Publishing Corporation
Publication Date
2015-11-11
Country of Publication
Egypt
No. of Pages
10
Main Subjects
Information Technology and Computer Science
Abstract EN
An FPGA has a finite routing capacity due to which a fair number of highly dense circuits fail to map on slightly underresourced architecture.
The high-interconnect demand in the congested regions is not met by the available resources as a result of which the circuit becomes unroutable for that particular architecture.
In this paper, we present a new placement approach which is based on a natural process called diffusion.
Our placer attempts to minimize the routing congestion by evenly disseminating the interconnect demand across an FPGA chip.
For the 20 MCNC benchmark circuits, our algorithm reduced the channel width for 15 circuits.
The results showed on average ~33% reduction in standard deviation of interconnect usage at an expense of an average ~13% penalty on critical path delay.
Maximum channel width gain of ~33% was also observed.
American Psychological Association (APA)
Asghar, Ali& Parvez, Husain. 2015. An Improved Diffusion Based Placement Algorithm for Reducing Interconnect Demand in Congested Regions of FPGAs. International Journal of Reconfigurable Computing،Vol. 2015, no. 2015, pp.1-10.
https://search.emarefa.net/detail/BIM-1066905
Modern Language Association (MLA)
Asghar, Ali& Parvez, Husain. An Improved Diffusion Based Placement Algorithm for Reducing Interconnect Demand in Congested Regions of FPGAs. International Journal of Reconfigurable Computing No. 2015 (2015), pp.1-10.
https://search.emarefa.net/detail/BIM-1066905
American Medical Association (AMA)
Asghar, Ali& Parvez, Husain. An Improved Diffusion Based Placement Algorithm for Reducing Interconnect Demand in Congested Regions of FPGAs. International Journal of Reconfigurable Computing. 2015. Vol. 2015, no. 2015, pp.1-10.
https://search.emarefa.net/detail/BIM-1066905
Data Type
Journal Articles
Language
English
Notes
Includes bibliographical references
Record ID
BIM-1066905