Design of Low Power Multiplier with Energy Efficient Full Adder Using DPTAAL
Joint Authors
Duraisamy, V.
Shunbaga Pradeepa, T.
Somasundareswari, D.
Kishore Kumar, A.
Source
Issue
Vol. 2013, Issue 2013 (31 Dec. 2013), pp.1-9, 9 p.
Publisher
Hindawi Publishing Corporation
Publication Date
2013-03-21
Country of Publication
Egypt
No. of Pages
9
Main Subjects
Engineering Sciences and Information Technology
Abstract EN
Asynchronous adiabatic logic (AAL) is a novel lowpower design technique which combines the energy saving benefits of asynchronous systems with adiabatic benefits.
In this paper, energy efficient full adder using double pass transistor with asynchronous adiabatic logic (DPTAAL) is used to design a low power multiplier.
Asynchronous adiabatic circuits are very low power circuits to preserve energy for reuse, which reduces the amount of energy drawn directly from the power supply.
In this work, an 8×8 multiplier using DPTAAL is designed and simulated, which exhibits low power and reliable logical operations.
To improve the circuit performance at reduced voltage level, double pass transistor logic (DPL) is introduced.
The power results of the proposed multiplier design are compared with the conventional CMOS implementation.
Simulation results show significant improvement in power for clock rates ranging from 100 MHz to 300 MHz.
American Psychological Association (APA)
Kishore Kumar, A.& Somasundareswari, D.& Duraisamy, V.& Shunbaga Pradeepa, T.. 2013. Design of Low Power Multiplier with Energy Efficient Full Adder Using DPTAAL. VLSI Design،Vol. 2013, no. 2013, pp.1-9.
https://search.emarefa.net/detail/BIM-450417
Modern Language Association (MLA)
Kishore Kumar, A.…[et al.]. Design of Low Power Multiplier with Energy Efficient Full Adder Using DPTAAL. VLSI Design No. 2013 (2013), pp.1-9.
https://search.emarefa.net/detail/BIM-450417
American Medical Association (AMA)
Kishore Kumar, A.& Somasundareswari, D.& Duraisamy, V.& Shunbaga Pradeepa, T.. Design of Low Power Multiplier with Energy Efficient Full Adder Using DPTAAL. VLSI Design. 2013. Vol. 2013, no. 2013, pp.1-9.
https://search.emarefa.net/detail/BIM-450417
Data Type
Journal Articles
Language
English
Notes
Includes bibliographical references
Record ID
BIM-450417