A Signature-Based Power Model for MPSoC on FPGA
Joint Authors
Pimentel, Andy D.
Piscitelli, Roberta
Source
Issue
Vol. 2012, Issue 2012 (31 Dec. 2012), pp.1-13, 13 p.
Publisher
Hindawi Publishing Corporation
Publication Date
2012-02-19
Country of Publication
Egypt
No. of Pages
13
Main Subjects
Engineering Sciences and Information Technology
Abstract EN
This paper presents a framework for high-level power estimation of multiprocessor systems-on-chip (MPSoC) architectures on FPGA.
The technique is based on abstract execution profiles, called event signatures, and it operates at a higher level of abstraction than, for example, commonly used instruction-set simulator (ISS)-based power estimation methods and should thus be capable of achieving good evaluation performance.
As a consequence, the technique can be very useful in the context of early system-level design space exploration.
We integrated the power estimation technique in a system-level MPSoC synthesis framework.
Subsequently, using this framework, we designed a range of different candidate architectures which contain different numbers of MicroBlaze processors and compared our power estimation results to those from real measurements on a Virtex-6 FPGA board.
American Psychological Association (APA)
Piscitelli, Roberta& Pimentel, Andy D.. 2012. A Signature-Based Power Model for MPSoC on FPGA. VLSI Design،Vol. 2012, no. 2012, pp.1-13.
https://search.emarefa.net/detail/BIM-453752
Modern Language Association (MLA)
Piscitelli, Roberta& Pimentel, Andy D.. A Signature-Based Power Model for MPSoC on FPGA. VLSI Design No. 2012 (2012), pp.1-13.
https://search.emarefa.net/detail/BIM-453752
American Medical Association (AMA)
Piscitelli, Roberta& Pimentel, Andy D.. A Signature-Based Power Model for MPSoC on FPGA. VLSI Design. 2012. Vol. 2012, no. 2012, pp.1-13.
https://search.emarefa.net/detail/BIM-453752
Data Type
Journal Articles
Language
English
Notes
Includes bibliographical references
Record ID
BIM-453752