Development and Validation of a Spike Detection and Classification Algorithm Aimed at Implementation on Hardware Devices

Abstract EN

Neurons cultured in vitro on MicroElectrode Array (MEA) devices connect to each other, forming a network.

To study electrophysiological activity and long term plasticity effects, long period recording and spike sorter methods are needed.

Therefore, on-line and real time analysis, optimization of memory use and data transmission rate improvement become necessary.

We developed an algorithm for amplitude-threshold spikes detection, whose performances were verified with (a) statistical analysis on both simulated and real signal and (b) Big O Notation.

Moreover, we developed a PCA-hierarchical classifier, evaluated on simulated and real signal.

Finally we proposed a spike detection hardware design on FPGA, whose feasibility was verified in terms of CLBs number, memory occupation and temporal requirements; once realized, it will be able to execute on-line detection and real time waveform analysis, reducing data storage problems.