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Translating Timing into an Architecture: The Synergy of COTSon and HLS (Domain Expertise—Designing a Computer Architecture via HLS)
المؤلفون المشاركون
Giorgi, Roberto
Khalili, Farnam
Procaccini, Marco
المصدر
International Journal of Reconfigurable Computing
العدد
المجلد 2019، العدد 2019 (31 ديسمبر/كانون الأول 2019)، ص ص. 1-18، 18ص.
الناشر
Hindawi Publishing Corporation
تاريخ النشر
2019-11-03
دولة النشر
مصر
عدد الصفحات
18
التخصصات الرئيسية
تكنولوجيا المعلومات وعلم الحاسوب
الملخص EN
Translating a system requirement into a low-level representation (e.g., register transfer level or RTL) is the typical goal of the design of FPGA-based systems.
However, the Design Space Exploration (DSE) needed to identify the final architecture may be time consuming, even when using high-level synthesis (HLS) tools.
In this article, we illustrate our hybrid methodology, which uses a frontend for HLS so that the DSE is performed more rapidly by using a higher level abstraction, but without losing accuracy, thanks to the HP-Labs COTSon simulation infrastructure in combination with our DSE tools (MYDSE tools).
In particular, this proposed methodology proved useful to achieve an appropriate design of a whole system in a shorter time than trying to design everything directly in HLS.
Our motivating problem was to deploy a novel execution model called data-flow threads (DF-Threads) running on yet-to-be-designed hardware.
For that goal, directly using the HLS was too premature in the design cycle.
Therefore, a key point of our methodology consists in defining the first prototype in our simulation framework and gradually migrating the design into the Xilinx HLS after validating the key performance metrics of our novel system in the simulator.
To explain this workflow, we first use a simple driving example consisting in the modelling of a two-way associative cache.
Then, we explain how we generalized this methodology and describe the types of results that we were able to analyze in the AXIOM project, which helped us reduce the development time from months/weeks to days/hours.
نمط استشهاد جمعية علماء النفس الأمريكية (APA)
Giorgi, Roberto& Khalili, Farnam& Procaccini, Marco. 2019. Translating Timing into an Architecture: The Synergy of COTSon and HLS (Domain Expertise—Designing a Computer Architecture via HLS). International Journal of Reconfigurable Computing،Vol. 2019, no. 2019, pp.1-18.
https://search.emarefa.net/detail/BIM-1168483
نمط استشهاد الجمعية الأمريكية للغات الحديثة (MLA)
Giorgi, Roberto…[et al.]. Translating Timing into an Architecture: The Synergy of COTSon and HLS (Domain Expertise—Designing a Computer Architecture via HLS). International Journal of Reconfigurable Computing No. 2019 (2019), pp.1-18.
https://search.emarefa.net/detail/BIM-1168483
نمط استشهاد الجمعية الطبية الأمريكية (AMA)
Giorgi, Roberto& Khalili, Farnam& Procaccini, Marco. Translating Timing into an Architecture: The Synergy of COTSon and HLS (Domain Expertise—Designing a Computer Architecture via HLS). International Journal of Reconfigurable Computing. 2019. Vol. 2019, no. 2019, pp.1-18.
https://search.emarefa.net/detail/BIM-1168483
نوع البيانات
مقالات
لغة النص
الإنجليزية
الملاحظات
Includes bibliographical references
رقم السجل
BIM-1168483
قاعدة معامل التأثير والاستشهادات المرجعية العربي "ارسيف Arcif"
أضخم قاعدة بيانات عربية للاستشهادات المرجعية للمجلات العلمية المحكمة الصادرة في العالم العربي
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