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On Improving the Performance of Dynamic DCVSL Circuits
المؤلفون المشاركون
Pandey, Neeta
Bajpai, Pratibha
Bagga, Shrey
Panda, Jeebananda
Gupta, Kirti
المصدر
Journal of Electrical and Computer Engineering
العدد
المجلد 2017، العدد 2017 (31 ديسمبر/كانون الأول 2017)، ص ص. 1-11، 11ص.
الناشر
Hindawi Publishing Corporation
تاريخ النشر
2017-04-04
دولة النشر
مصر
عدد الصفحات
11
التخصصات الرئيسية
تكنولوجيا المعلومات وعلم الحاسوب
الملخص EN
This contribution aims at improving the performance of Dynamic Differential Cascode Voltage Switch Logic (Dy-DCVSL) and Enhanced Dynamic Differential Cascode Voltage Switch Logic (EDCVSL) and suggests three architectures for the same.
The first architecture uses transmission gates (TG) to reduce the logic tree depth and width, which results in speed improvement.
As leakage is a dominant issue in lower technology nodes, the second architecture is proposed by adapting the leakage control technique (LECTOR) in Dy-DCVSL and EDCVSL.
The third proposed architecture combines features of both the first and the second architectures.
The operation of the proposed architectures has been verified through extensive simulations with different CMOS submicron technology nodes (90 nm, 65 nm, and 45 nm).
The delay of the gates based on the first architecture remains almost the same for different functionalities.
It is also observed that Dy-DCVSL gates are 1.6 to 1.4 times faster than their conventional counterpart.
The gates based on the second architecture show a maximum of 74.3% leakage power reduction.
Also, it is observed that the percentage of reduction in leakage power increases with technology scaling.
Lastly, the gates based on the third architecture achieve similar leakage power reduction values to the second one but are not able to exhibit the same speed advantage as achieved with the first architecture.
نمط استشهاد جمعية علماء النفس الأمريكية (APA)
Bajpai, Pratibha& Pandey, Neeta& Gupta, Kirti& Bagga, Shrey& Panda, Jeebananda. 2017. On Improving the Performance of Dynamic DCVSL Circuits. Journal of Electrical and Computer Engineering،Vol. 2017, no. 2017, pp.1-11.
https://search.emarefa.net/detail/BIM-1175393
نمط استشهاد الجمعية الأمريكية للغات الحديثة (MLA)
Bajpai, Pratibha…[et al.]. On Improving the Performance of Dynamic DCVSL Circuits. Journal of Electrical and Computer Engineering No. 2017 (2017), pp.1-11.
https://search.emarefa.net/detail/BIM-1175393
نمط استشهاد الجمعية الطبية الأمريكية (AMA)
Bajpai, Pratibha& Pandey, Neeta& Gupta, Kirti& Bagga, Shrey& Panda, Jeebananda. On Improving the Performance of Dynamic DCVSL Circuits. Journal of Electrical and Computer Engineering. 2017. Vol. 2017, no. 2017, pp.1-11.
https://search.emarefa.net/detail/BIM-1175393
نوع البيانات
مقالات
لغة النص
الإنجليزية
الملاحظات
Includes bibliographical references
رقم السجل
BIM-1175393
قاعدة معامل التأثير والاستشهادات المرجعية العربي "ارسيف Arcif"
أضخم قاعدة بيانات عربية للاستشهادات المرجعية للمجلات العلمية المحكمة الصادرة في العالم العربي
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