Design and implementation of programmable FIR filter using FPGA

الملخص EN

This paper presents the design and implementation of a programmable Finite Impulse Response (FIR) Filter using ALTERA Field Programmable Gate Array (FPGA) device.

The filter performance is first tested using Filter Design and Analysis (FDA) tool from Mathworks to verify magnitude response and obtain coefficient tables.

The test operation includes LPF and BPF filter types with coefficient lengths of 7 and 31 respectively.

The FPGA design is carried out by writing VHDL modules for different filter components.

The simulation waveforms, synthesis reports and board programming files have obtained using the package QUARTUSII.

ALTERA-FLEX10K10 FPGA Family with EPF10K10LC84-3 board is used as a target device for implementation purpose.