Design of an RF front-end receiver by using Nano-scale CMOS technology

العناوين الأخرى

تصميم دائرة استقبال راديوية باستخدام تقنية النانو سيموس

مقدم أطروحة جامعية

al-Duri, Dhakir Madhi Faysal

مشرف أطروحة جامعية

Shahruri, Fadi Riyad

أعضاء اللجنة

Abu Gharbiyah, Khaldun
Ali, Ali Abbas
Mismar, Muhammad

الجامعة

جامعة الأميرة سمية للتكنولوجيا

الكلية

كلية الملك عبدالله الثاني للهندسة

القسم الأكاديمي

قسم الهندسة الكهربائية

دولة الجامعة

الأردن

الدرجة العلمية

ماجستير

تاريخ الدرجة العلمية

2016

الملخص الإنجليزي

The significant development in wireless communications has led to an increase in the demand on RF front-end receivers.

Different RF front-end receivers with various architectures like; heterodyne, homodyne and low IF architectures have been designed in different previous works.

In this work, the design of a homodyne RF front-end receiver is presented.

The architecture of direct conversion receiver consists of three main components; CGLNA (Common Gate Low Noise Amplifier), passive mixer and QVCO (Quadrature Voltage-Controlled Oscillator).

This topology of components has been selected to attain low voltage supply, smaller size, low-power consumption, low NF (Noise Figure) and low cost.

Therefore, the receiver design specifications are as follows; 2.4 GHz operating frequency, 0.9 V supply voltage, and the results are; a power consumption of 1.68 mW, a noise figure of 4.91 dB and a 1dBm input of 0.374 dBm.

The circuit design work; i.e., schematic and simulation of direct conversion receiver components, has been simulated using Synopsys Custom Designer and HSPICE CAD tools in the 28 nm CMOS technology.

Furthermore, the inductor for the LC tank circuit has been designed by ASITIC software program.

التخصصات الرئيسية

الهندسة الكهربائية

عدد الصفحات

94

قائمة المحتويات

• APA
• MLA
• AMA

لغة النص

الإنجليزية

نوع البيانات

رسائل جامعية

رقم السجل

BIM-720832