Proposal new cache coherence protocol to optimize CPU time through simulation caches

المؤلفون المشاركون

Jalil, Luma Fayiq
al-Rawi, Maha Abd al-Karim Hammud
al-Naqshabandi, Abir Diya

المصدر

Engineering and Technology Journal

العدد

المجلد 34، العدد 6B (30 يونيو/حزيران 2016)، ص ص. 912-924، 13ص.

الناشر

الجامعة التكنولوجية

تاريخ النشر

2016-06-30

دولة النشر

العراق

عدد الصفحات

13

التخصصات الرئيسية

العلوم الهندسية والتكنولوجية (متداخلة التخصصات)

الملخص EN

The cache coherence is the most important issue that rapidly affected the performance of a multicore processor as a result of increasing the number of cores on chip multiprocessors and the shared memory program that will be run on these processors.

"Snoopy protocols" and "directory based protocols" are two types of protocols that are used to achieve coherence between caches.

The main objective of these Protocols is to achieve consistency and validation of the data value in the caches of a multi core processor so that any reading of a memory address via any caches will returns the latest data written to that address.

In this paper, a new protocol has been designed to solve a problem of a cache coherence that combines the two schemes of coherency: snooping and directory depending on the states of MESI protocol.

The MESI protocol is a version of the snooping cache protocol which based on four (Modified, Exclusive, Shared, Invalid) states that a block in the cache memory can have.

The proposed protocol has the same states of MESI protocol but the difference is in laying the directory inside a shared cache instead of main memory to make the processor more efficient by reducing the gap between fast CPU and slow main memory.

نمط استشهاد جمعية علماء النفس الأمريكية (APA)

Jalil, Luma Fayiq& al-Rawi, Maha Abd al-Karim Hammud& al-Naqshabandi, Abir Diya. 2016. Proposal new cache coherence protocol to optimize CPU time through simulation caches. Engineering and Technology Journal،Vol. 34, no. 6B, pp.912-924.
https://search.emarefa.net/detail/BIM-770629

نمط استشهاد الجمعية الأمريكية للغات الحديثة (MLA)

Jalil, Luma Fayiq…[et al.]. Proposal new cache coherence protocol to optimize CPU time through simulation caches. Engineering and Technology Journal Vol. 34, no. 6B (2016), pp.912-924.
https://search.emarefa.net/detail/BIM-770629

نمط استشهاد الجمعية الطبية الأمريكية (AMA)

Jalil, Luma Fayiq& al-Rawi, Maha Abd al-Karim Hammud& al-Naqshabandi, Abir Diya. Proposal new cache coherence protocol to optimize CPU time through simulation caches. Engineering and Technology Journal. 2016. Vol. 34, no. 6B, pp.912-924.
https://search.emarefa.net/detail/BIM-770629

نوع البيانات

مقالات

لغة النص

الإنجليزية

الملاحظات

Includes bibliographical references : p. 923-924

رقم السجل

BIM-770629