Facilitating Preemptive Hardware System Design Using Partial Reconfiguration Techniques

Abstract EN

In FPGA-based control system design, partial reconfigurationis especially well suited to implement preemptivesystems.

In real-time systems, the deadline for critical taskcan compel the preemption of noncritical one.

Besides, anasynchronous event can demand immediate attention and, then,force launching a reconfiguration process for high-priority taskimplementation.

If the asynchronous event is previously scheduled,an explicit activation of the reconfiguration process isperformed.

If the event cannot be previously programmed, suchas in dynamically scheduled systems, an implicit activation tothe reconfiguration process is demanded.

This paper provides ahardware-based approach to explicit and implicit activation ofthe partial reconfiguration process in dynamically reconfigurableSoCs and includes all the necessary tasks to cope with thisissue.

Furthermore, the reconfiguration service introduced in thiswork allows remote invocation of the reconfiguration process andthen the remote integration of off-chip components.

A modelthat offers component location transparency is also presented toenhance and facilitate system integration.