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Low Latency Network-on-Chip Router Microarchitecture Using Request Masking Technique
Joint Authors
Monemi, Alireza
Ooi, Chia Yee
Marsono, Muhammad Nadzir
Source
International Journal of Reconfigurable Computing
Issue
Vol. 2015, Issue 2015 (31 Dec. 2015), pp.1-13, 13 p.
Publisher
Hindawi Publishing Corporation
Publication Date
2015-03-15
Country of Publication
Egypt
No. of Pages
13
Main Subjects
Information Technology and Computer Science
Abstract EN
Network-on-Chip (NoC) is fast emerging as an on-chip communication alternative for many-core System-on-Chips (SoCs).
However, designing a high performance low latency NoC with low area overhead has remained a challenge.
In this paper, we present a two-clock-cycle latency NoC microarchitecture.
An efficient request masking technique is proposed to combine virtual channel (VC) allocation with switch allocation nonspeculatively.
Our proposed NoC architecture is optimized in terms of area overhead, operating frequency, and quality-of-service (QoS).
We evaluate our NoC against CONNECT, an open source low latency NoC design targeted for field-programmable gate array (FPGA).
The experimental results on several FPGA devices show that our NoC router outperforms CONNECT with 50% reduction of logic cells (LCs) utilization, while it works with 100% and 35%~20% higher operating frequency compared to the one- and two-clock-cycle latency CONNECT NoC routers, respectively.
Moreover, the proposed NoC router achieves 2.3 times better performance compared to CONNECT.
American Psychological Association (APA)
Monemi, Alireza& Ooi, Chia Yee& Marsono, Muhammad Nadzir. 2015. Low Latency Network-on-Chip Router Microarchitecture Using Request Masking Technique. International Journal of Reconfigurable Computing،Vol. 2015, no. 2015, pp.1-13.
https://search.emarefa.net/detail/BIM-1066902
Modern Language Association (MLA)
Monemi, Alireza…[et al.]. Low Latency Network-on-Chip Router Microarchitecture Using Request Masking Technique. International Journal of Reconfigurable Computing No. 2015 (2015), pp.1-13.
https://search.emarefa.net/detail/BIM-1066902
American Medical Association (AMA)
Monemi, Alireza& Ooi, Chia Yee& Marsono, Muhammad Nadzir. Low Latency Network-on-Chip Router Microarchitecture Using Request Masking Technique. International Journal of Reconfigurable Computing. 2015. Vol. 2015, no. 2015, pp.1-13.
https://search.emarefa.net/detail/BIM-1066902
Data Type
Journal Articles
Language
English
Notes
Includes bibliographical references
Record ID
BIM-1066902