Optimization and Characterization of CMOS for Ultra Low Power Applications
Joint Authors
Pable, S. D.
Kafeel, Mohd. Ajmal
Hasan, Mohd.
Alam, M. Shah
Source
Issue
Vol. 2015, Issue 2015 (31 Dec. 2015), pp.1-6, 6 p.
Publisher
Hindawi Publishing Corporation
Publication Date
2015-12-22
Country of Publication
Egypt
No. of Pages
6
Main Subjects
Abstract EN
Aggressive voltage scaling into the subthreshold operating region holds great promise for applications with strict energy budget.
However, it has been established that higher speed superthreshold device is not suitable for moderate performance subthreshold circuits.
The design constraint for selecting V t h and T O X is much more flexible for subthreshold circuits at low voltage level than superthreshold circuits.
In order to obtain better performance from a device under subthreshold conditions, it is necessary to investigate and optimize the process and geometry parameters of a Si MOSFET at nanometer technology node.
This paper calibrates the fabrication process parameters and electrical characteristics for n- and p-MOSFETs with 35 nm physical gate length.
Thereafter, the calibrated device for superthreshold application is optimized for better performance under subthreshold conditions using TCAD simulation.
The device simulated in this work shows 9.89% improvement in subthreshold slope and 34% advantage in I O N / I O F F ratio for the same drive current.
American Psychological Association (APA)
Kafeel, Mohd. Ajmal& Pable, S. D.& Hasan, Mohd.& Alam, M. Shah. 2015. Optimization and Characterization of CMOS for Ultra Low Power Applications. Journal of Nanotechnology،Vol. 2015, no. 2015, pp.1-6.
https://search.emarefa.net/detail/BIM-1069540
Modern Language Association (MLA)
Kafeel, Mohd. Ajmal…[et al.]. Optimization and Characterization of CMOS for Ultra Low Power Applications. Journal of Nanotechnology No. 2015 (2015), pp.1-6.
https://search.emarefa.net/detail/BIM-1069540
American Medical Association (AMA)
Kafeel, Mohd. Ajmal& Pable, S. D.& Hasan, Mohd.& Alam, M. Shah. Optimization and Characterization of CMOS for Ultra Low Power Applications. Journal of Nanotechnology. 2015. Vol. 2015, no. 2015, pp.1-6.
https://search.emarefa.net/detail/BIM-1069540
Data Type
Journal Articles
Language
English
Notes
Includes bibliographical references
Record ID
BIM-1069540