A Processor-Sharing Scheduling Strategy for NFV Nodes
Joint Authors
Lombardo, Alfio
Schembra, Giovanni
Faraci, Giuseppe
Source
Journal of Electrical and Computer Engineering
Issue
Vol. 2016, Issue 2016 (31 Dec. 2016), pp.1-10, 10 p.
Publisher
Hindawi Publishing Corporation
Publication Date
2016-02-04
Country of Publication
Egypt
No. of Pages
10
Main Subjects
Information Technology and Computer Science
Abstract EN
The introduction of the two paradigms SDN and NFV to “softwarize” the current Internet is making management and resource allocation two key challenges in the evolution towards the Future Internet.
In this context, this paper proposes Network-Aware Round Robin (NARR), a processor-sharing strategy, to reduce delays in traversing SDN/NFV nodes.
The application of NARR alleviates the job of the Orchestrator by automatically working at the intranode level, dynamically assigning the processor slices to the virtual network functions (VNFs) according to the state of the queues associated with the output links of the network interface cards (NICs).
An extensive simulation set is presented to show the improvements achieved with respect to two more processor-sharing strategies chosen as reference.
American Psychological Association (APA)
Faraci, Giuseppe& Lombardo, Alfio& Schembra, Giovanni. 2016. A Processor-Sharing Scheduling Strategy for NFV Nodes. Journal of Electrical and Computer Engineering،Vol. 2016, no. 2016, pp.1-10.
https://search.emarefa.net/detail/BIM-1108429
Modern Language Association (MLA)
Faraci, Giuseppe…[et al.]. A Processor-Sharing Scheduling Strategy for NFV Nodes. Journal of Electrical and Computer Engineering No. 2016 (2016), pp.1-10.
https://search.emarefa.net/detail/BIM-1108429
American Medical Association (AMA)
Faraci, Giuseppe& Lombardo, Alfio& Schembra, Giovanni. A Processor-Sharing Scheduling Strategy for NFV Nodes. Journal of Electrical and Computer Engineering. 2016. Vol. 2016, no. 2016, pp.1-10.
https://search.emarefa.net/detail/BIM-1108429
Data Type
Journal Articles
Language
English
Notes
Includes bibliographical references
Record ID
BIM-1108429