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Exploring Shared SRAM Tables in FPGAs for Larger LUTs and Higher Degree of Sharing
Joint Authors
Parvez, Husain
Rashid, Muhammad
Asghar, Ali
Iqbal, Muhammad Mazher
Ahmed, Waqar
Ali, Mujahid
Source
International Journal of Reconfigurable Computing
Issue
Vol. 2017, Issue 2017 (31 Dec. 2017), pp.1-9, 9 p.
Publisher
Hindawi Publishing Corporation
Publication Date
2017-06-13
Country of Publication
Egypt
No. of Pages
9
Main Subjects
Information Technology and Computer Science
Abstract EN
In modern SRAM based Field Programmable Gate Arrays, a Look-Up Table (LUT) is the principal constituent logic element which can realize every possible Boolean function.
However, this flexibility of LUTs comes with a heavy area penalty.
A part of this area overhead comes from the increased amount of configuration memory which rises exponentially as the LUT size increases.
In this paper, we first present a detailed analysis of a previously proposed FPGA architecture which allows sharing of LUTs memory (SRAM) tables among NPN-equivalent functions, to reduce the area as well as the number of configuration bits.
We then propose several methods to improve the existing architecture.
A new clustering technique has been proposed which packs NPN-equivalent functions together inside a Configurable Logic Block (CLB).
We also make use of a recently proposed high performance Boolean matching algorithm to perform NPN classification.
To enhance area savings further, we evaluate the feasibility of more than two LUTs sharing the same SRAM table.
Consequently, this work explores the SRAM table sharing approach for a range of LUT sizes (4–7), while varying the cluster sizes (4–16).
Experimental results on MCNC benchmark circuits set show an overall area reduction of ~7% while maintaining the same critical path delay.
American Psychological Association (APA)
Asghar, Ali& Iqbal, Muhammad Mazher& Ahmed, Waqar& Ali, Mujahid& Parvez, Husain& Rashid, Muhammad. 2017. Exploring Shared SRAM Tables in FPGAs for Larger LUTs and Higher Degree of Sharing. International Journal of Reconfigurable Computing،Vol. 2017, no. 2017, pp.1-9.
https://search.emarefa.net/detail/BIM-1169440
Modern Language Association (MLA)
Asghar, Ali…[et al.]. Exploring Shared SRAM Tables in FPGAs for Larger LUTs and Higher Degree of Sharing. International Journal of Reconfigurable Computing No. 2017 (2017), pp.1-9.
https://search.emarefa.net/detail/BIM-1169440
American Medical Association (AMA)
Asghar, Ali& Iqbal, Muhammad Mazher& Ahmed, Waqar& Ali, Mujahid& Parvez, Husain& Rashid, Muhammad. Exploring Shared SRAM Tables in FPGAs for Larger LUTs and Higher Degree of Sharing. International Journal of Reconfigurable Computing. 2017. Vol. 2017, no. 2017, pp.1-9.
https://search.emarefa.net/detail/BIM-1169440
Data Type
Journal Articles
Language
English
Notes
Includes bibliographical references
Record ID
BIM-1169440