Critical Gates Identification for Fault-Tolerant Design in Math Circuits
Joint Authors
Ban, Tian
Junior, Gutemberg G. S.
Source
Journal of Electrical and Computer Engineering
Issue
Vol. 2017, Issue 2017 (31 Dec. 2017), pp.1-7, 7 p.
Publisher
Hindawi Publishing Corporation
Publication Date
2017-03-02
Country of Publication
Egypt
No. of Pages
7
Main Subjects
Information Technology and Computer Science
Abstract EN
Hardware redundancy at different levels of design is a common fault mitigation technique, which is well known for its efficiency to the detriment of area overhead.
In order to reduce this drawback, several fault-tolerant techniques have been proposed in literature to find a good trade-off.
In this paper, critical constituent gates in math circuits are detected and graded based on the impact of an error in the output of a circuit.
These critical gates should be hardened first under the area constraint of design criteria.
Indeed, output bits considered crucial to a system receive higher priorities to be protected, reducing the occurrence of critical errors.
The 74283 fast adder is used as an example to illustrate the feasibility and efficiency of the proposed approach.
American Psychological Association (APA)
Ban, Tian& Junior, Gutemberg G. S.. 2017. Critical Gates Identification for Fault-Tolerant Design in Math Circuits. Journal of Electrical and Computer Engineering،Vol. 2017, no. 2017, pp.1-7.
https://search.emarefa.net/detail/BIM-1175330
Modern Language Association (MLA)
Ban, Tian& Junior, Gutemberg G. S.. Critical Gates Identification for Fault-Tolerant Design in Math Circuits. Journal of Electrical and Computer Engineering No. 2017 (2017), pp.1-7.
https://search.emarefa.net/detail/BIM-1175330
American Medical Association (AMA)
Ban, Tian& Junior, Gutemberg G. S.. Critical Gates Identification for Fault-Tolerant Design in Math Circuits. Journal of Electrical and Computer Engineering. 2017. Vol. 2017, no. 2017, pp.1-7.
https://search.emarefa.net/detail/BIM-1175330
Data Type
Journal Articles
Language
English
Notes
Includes bibliographical references
Record ID
BIM-1175330