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Modelling and Assertion-Based Verification of Run-Time Reconfigurable Designs Using Functional Programming Abstractions
Joint Authors
Uchevler, Bahram N.
Svarstad, Kjetil
Source
International Journal of Reconfigurable Computing
Issue
Vol. 2018, Issue 2018 (31 Dec. 2018), pp.1-25, 25 p.
Publisher
Hindawi Publishing Corporation
Publication Date
2018-07-10
Country of Publication
Egypt
No. of Pages
25
Main Subjects
Information Technology and Computer Science
Abstract EN
With the increasing design and production costs and long time-to-market for Application Specific Integrated Circuits (ASICs), implementing digital circuits on reconfigurable hardware is becoming a more common practice.
A reconfigurable hardware combines the flexibility of the software domain with the high performance of the hardware domain and provides a flexible life cycle management for the product with a lower cost.
A complete design and assertion-based verification flow for Run-Time Reconfigurable (RTR) designs using functional programming abstractions of Haskell are proposed in this article, in which partially reconfigurable hardware is used as the implementation platform.
The proposed flow includes modelling of RTR designs in high levels of abstraction by using higher-order functions and polymorphism in Haskell, as well as their implementation on partially reconfigurable Field Programmable Gate Arrays (FPGAs).
Assertion-based verification (ABV) is used as the verification approach which is integrated in the early stages of the design flow.
Assertions can be used to verify specifications of designs in different verification methods such as simulation-based and formal verification.
A partitioning algorithm is proposed for clustering the assertion-checker circuits to implement the verification circuits in a limited reconfigurable area in the target FPGA.
The proposed flow is evaluated by using example designs on a Zynq FPGA as the hardware/software implementation platform.
American Psychological Association (APA)
Uchevler, Bahram N.& Svarstad, Kjetil. 2018. Modelling and Assertion-Based Verification of Run-Time Reconfigurable Designs Using Functional Programming Abstractions. International Journal of Reconfigurable Computing،Vol. 2018, no. 2018, pp.1-25.
https://search.emarefa.net/detail/BIM-1175514
Modern Language Association (MLA)
Uchevler, Bahram N.& Svarstad, Kjetil. Modelling and Assertion-Based Verification of Run-Time Reconfigurable Designs Using Functional Programming Abstractions. International Journal of Reconfigurable Computing No. 2018 (2018), pp.1-25.
https://search.emarefa.net/detail/BIM-1175514
American Medical Association (AMA)
Uchevler, Bahram N.& Svarstad, Kjetil. Modelling and Assertion-Based Verification of Run-Time Reconfigurable Designs Using Functional Programming Abstractions. International Journal of Reconfigurable Computing. 2018. Vol. 2018, no. 2018, pp.1-25.
https://search.emarefa.net/detail/BIM-1175514
Data Type
Journal Articles
Language
English
Notes
Includes bibliographical references
Record ID
BIM-1175514