Comprehensive Study of Kinetics of Processes Competing during PECVD Ultrathin Silicon Layer High-Temperature Annealing

Abstract EN

Application of low-temperature PECVD is a very tempting option for formation of ultrathin silicon layers for nanoelectronic and nanophotonic applications, as followed by annealing of this layer, regardless if executed as individual process performed in controlled ambient or during following high-temperature processes, allows for phase and content changes in the silicon layer.

Understanding complex changes that can take place during such process, which depend on its temperature, conditions (e.g., oxygen availability), and timeframe, is a fundamental requirement for conscious application of such technology.

It is worth realizing that nanodevices with their unprecedented variety of structures and devices require many different fabrication technologies.

Hence, depending on the application in mind, different results of ultrathin silicon layer annealing may appear advantageous.

During high-temperature processing (e.g., annealing) of PECVD ultrathin silicon layer, three competing effects have to be taken into account.

These are amorphous silicon recrystallization and oxidation of amorphous and crystalline (as-deposited or just recrystallized from as-deposited amorphous phase) silicon (both of which by nature exhibit different kinetics).

So far, most of attention has been paid to silicon recrystallization, which was justified by the fact that under experimental conditions studied (silicon multilayers) oxidation was certainly of less importance.

In certain applications, the required device structure consists of single (and not multiple) ultrathin silicon layer, and thus, oxidation effects certainly have to be included into considerations.

Understanding dynamics and very complex relations between these individual effects is thus mandatory for using consciously this technique and achieving needed properties of the layer.

It has to be stated clearly that although the achieved results, presented in this study, refer to the silicon layers fabricated under certain conditions (particular type of PECVD reactor and process parameters), they can, however, be easily extrapolated for similar cases too.

The presented below results are, to our knowledge, the first successful attempt to address these issues.