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A novel transistor level implementation of a high speed packet switch
Joint Authors
Arumugam, shanmugam
Govindaswamy, shanthi
Boya, praveen kumar
Source
The International Arab Journal of Information Technology
Issue
Vol. 3, Issue 3 (31 Jul. 2006), pp.226-230, 5 p.
Publisher
Publication Date
2006-07-31
Country of Publication
Jordan
No. of Pages
5
Main Subjects
Information Technology and Computer Science
Topics
Abstract EN
High speed packet switches are inevitable for ultra high data rate networking systems.
The throughput of these switches has to be ideally 100% for effective utilization of the network.
While Output Queued (OQ) switches have the optimal delay-throughput performance for all traffic distributions, they require N-times speed up in the fabric that limits the scalability of this architecture.
An Input Queued (IQ) switch is desirable for high speed switching, since the internal operation speed is only slightly higher than the speed of the input lines.
However, the input queued switch has the critical drawback that the overall throughput is limited to 58.6% due to the Head-of-Line (HOL) blocking phenomenon.
In this paper, we present a novel transistor level implementation of an IQ packet switch, using TSPICE.
Our circuit has a regular structure and low transistor count.
Our simulation results indicate that the circuit may be used to implement switches working well beyond 1GHz.
American Psychological Association (APA)
Arumugam, shanmugam& Govindaswamy, shanthi& Boya, praveen kumar. 2006. A novel transistor level implementation of a high speed packet switch. The International Arab Journal of Information Technology،Vol. 3, no. 3, pp.226-230.
https://search.emarefa.net/detail/BIM-11848
Modern Language Association (MLA)
Boya, praveen kumar…[et al.]. A novel transistor level implementation of a high speed packet switch. The International Arab Journal of Information Technology Vol. 3, no. 3 (Jul. 2006), pp.226-230.
https://search.emarefa.net/detail/BIM-11848
American Medical Association (AMA)
Arumugam, shanmugam& Govindaswamy, shanthi& Boya, praveen kumar. A novel transistor level implementation of a high speed packet switch. The International Arab Journal of Information Technology. 2006. Vol. 3, no. 3, pp.226-230.
https://search.emarefa.net/detail/BIM-11848
Data Type
Journal Articles
Language
English
Notes
includes bibliographical references : p. 229
Record ID
BIM-11848