Fully optimized ultra wideband rf receiver front end

Abstract EN

This paper proposes a novel and fully optimized ultra-wideband RF receiver front end in UMC 180nm 1P6M CMOS process.

The heterodyne architecture used in this work does not use the on-chip image reject mixer.

The proposed receiver consists of a cascode inductively degenerated common source differential low noise amplifier and a folded Gilbert down-conversion mixer.

The differential low-noise amplifier eliminates the use of active balun and improves the noise performance, while the folded architecture reduces the power dissipation of the receiver.

The post-layout simulated result shows that the receiver has a voltage gain of 15.2 - 19.8dB, a noise figure of 4.8 - 8.9dB, a third-order input intercept point (IIP3) of -6.3 to -2.9dBm and consumes 31.5mW from a 1.8V supply.

The receiver has a good reverse isolation S12 of -42 to -59dB due to cascode configuration and occupies an area of 2.55mm2.