A lvds transmitter with low-jitter pll and pre-emphasis for serial link
Joint Authors
Wei, Xueming
Li, Ping
Wang, Yiweng J.
Source
Issue
Vol. 7, Issue 3 (30 Sep. 2011), pp.373-381, 9 p.
Publisher
Publication Date
2011-09-30
Country of Publication
Algeria
No. of Pages
9
Main Subjects
Topics
Abstract EN
A high-speed low-voltage differential signal (LVDS) transmitter adopts an improved feedback structure to stabilize the output current and the common-mode voltage of the differential signal.
Meanwhile, a conventional VCO and pre-emphasis circuit is improved to reduce jitter and inter-symbol interference in the transmission line.
The transmitter is implemented in 0.13-m standard 1P8M CMOS process and integrated into a high speed SERDES (Serial and De-serial) chip.
The test results of the SERDES show that the differential swing voltage and common-mode voltage of LVDS are 450mv and 1.2V, respectively.
The pre-emphasis compensates enough channel loss at 1.5 Gb/s.
The total power consumption of the transmitter is 80mW at 1.5 Gb/s.
American Psychological Association (APA)
Wei, Xueming& Li, Ping& Wang, Yiweng J.. 2011. A lvds transmitter with low-jitter pll and pre-emphasis for serial link. Journal of Electrical Systems،Vol. 7, no. 3, pp.373-381.
https://search.emarefa.net/detail/BIM-291172
Modern Language Association (MLA)
Wei, Xueming…[et al.]. A lvds transmitter with low-jitter pll and pre-emphasis for serial link. Journal of Electrical Systems Vol. 7, no. 3 (Sep. 2011), pp.373-381.
https://search.emarefa.net/detail/BIM-291172
American Medical Association (AMA)
Wei, Xueming& Li, Ping& Wang, Yiweng J.. A lvds transmitter with low-jitter pll and pre-emphasis for serial link. Journal of Electrical Systems. 2011. Vol. 7, no. 3, pp.373-381.
https://search.emarefa.net/detail/BIM-291172
Data Type
Journal Articles
Language
English
Notes
Includes bibliographical references : p. 380-381
Record ID
BIM-291172
