A power-efficient process selection, gain optimization, and noise canceling technique for a 130-nm microwave amplifier

Abstract EN

Employing 130-nm IBM CMOS model parameters, the design of a power-efficient single-stage microwave amplifier is presented in this paper.

An optimization technique for the amplifier forward gain is proposed through careful selection of process elements without compromising the architecture’s high degree of isolation and resistance to reflection-loss.

A novel mechanism to match port-impedances of the amplifier to characteristic impedance of microwave elements is introduced.

The amplifier operates at 20.6 GHz (suitable for an on-chip wideband transceiver) and dissipates 13.7015 mW (dc) from a 1.2-V power rail.

The forward gain of the proposed design is 8.32 dB, supporting a 3-dB bandwidth of 5.4 GHz and a port-isolation figure (in the reverse direction) which is better than 32 dB in the entire bandwidth.

The imaginary constituents of the port impedances are eliminated with the technique to obtain pea input / output reflection parameters of -30 dB and -33 dB, respectively.

Noise optimization pushes the amplifier NF below 4.5 dB, allowing it to satisfy the criteria of a low noise, low power microwave device suitable for radio-frequency wireless receivers.

A figure-of-merit parameter is established for the proposed technique and the simulated results are compared with published amplifiers to illustrate their advantages.