Fpga design and implementation of a scan conversion graphical sub-system

Abstract EN

One Major modeling primitive in the field of Computer Graphics is a planar polygon.

This polygon can have an arbitrary number of vertices and different shapes.

In this paper a graphic sub-system is designed and implemented using Field Programmable Gate Array ( FPGA ).

One of the main tasks of the hardware designed is scanconverting convex planar polygons required to update an image in the image memory or video RAM which is used as a Frame Buffer.

A facility to read the pixels (Picture Elements), from the frame buffer, for display on the monitor of the computer is also included in the design.