Effect of thickness and annealing temperature on (C-V)‎ characterization of CdSSi heterojunction preparing by DC planar magnetron sputtering technique and study of D.C. electrical conductivity

Abstract EN

The thin films of CdS deposited on silicon wafers substrate by (dc planar magnetron sputtering techniques).

and they are study photovoltaic characteristics of (n-CdS / p-Si) Heterojunction, then we found type of heterojunction is abrupt type, also we calculated built-in potential (Vbi) at (400 kHz) and for thickness (100, 200 and 300) nm for different temperatures (303, 373 and 473) K and study the variation junction capacitance with bias voltage, variation voltage with reciprocal of square capacitance, and the width of depletion layer can be calculated and study of the variation of electrical conductivity as a function of temperature for different thicknesses, it is clear from this study that the conductivity for all deposited films increases with thickness, and increases with temperature.

Also its observed that the conductivity of the films decreases with increasing of annealing temperatures and we found there are tow activation energy can be calculated in this study.