A 0.8 V 0.23 nW 1.5 ns Full-Swing Pass-Transistor XOR Gate in 130 nm CMOS
Joint Authors
Hasan, S. M. Rezaul
Ahmad, Nabihah
Source
Active and Passive Electronic Components
Issue
Vol. 2013, Issue 2013 (31 Dec. 2013), pp.1-6, 6 p.
Publisher
Hindawi Publishing Corporation
Publication Date
2013-03-31
Country of Publication
Egypt
No. of Pages
6
Main Subjects
Abstract EN
A power efficient circuit topology is proposed to implement a low-voltage CMOS 2-input pass-transistor XOR gate.
This design aims to minimize power dissipation and reduce transistor count while at the same time reducing the propagation delay.
The XOR gate utilizes six transistors to achieve a compact circuit design and was fabricated using the 130 nm IBM CMOS process.
The performance of the XOR circuit was validated against other XOR gate designs through simulations using the same 130 nm CMOS process.
The area of the core circuit is only about 56 sq · µm with 1.5659 ns propagation delay and 0.2312 nW power dissipation at 0.8 V supply voltage.
The proposed six-transistor implementation thus compares favorably with other existing XOR gate designs.
American Psychological Association (APA)
Ahmad, Nabihah& Hasan, S. M. Rezaul. 2013. A 0.8 V 0.23 nW 1.5 ns Full-Swing Pass-Transistor XOR Gate in 130 nm CMOS. Active and Passive Electronic Components،Vol. 2013, no. 2013, pp.1-6.
https://search.emarefa.net/detail/BIM-449623
Modern Language Association (MLA)
Ahmad, Nabihah& Hasan, S. M. Rezaul. A 0.8 V 0.23 nW 1.5 ns Full-Swing Pass-Transistor XOR Gate in 130 nm CMOS. Active and Passive Electronic Components No. 2013 (2013), pp.1-6.
https://search.emarefa.net/detail/BIM-449623
American Medical Association (AMA)
Ahmad, Nabihah& Hasan, S. M. Rezaul. A 0.8 V 0.23 nW 1.5 ns Full-Swing Pass-Transistor XOR Gate in 130 nm CMOS. Active and Passive Electronic Components. 2013. Vol. 2013, no. 2013, pp.1-6.
https://search.emarefa.net/detail/BIM-449623
Data Type
Journal Articles
Language
English
Notes
Includes bibliographical references
Record ID
BIM-449623