Redesigned-Scale-Free CORDIC Algorithm Based FPGA Implementation of Window Functions to Minimize Area and Latency
Joint Authors
Aggarwal, Supriya
Khare, Kavita
Source
International Journal of Reconfigurable Computing
Issue
Vol. 2012, Issue 2012 (31 Dec. 2012), pp.1-8, 8 p.
Publisher
Hindawi Publishing Corporation
Publication Date
2012-08-01
Country of Publication
Egypt
No. of Pages
8
Main Subjects
Topics
Abstract EN
One of the most important steps in spectral analysis is filtering, where window functions are generally used to design filters.
In this paper, we modify the existing architecture for realizing the window functions using CORDIC processor.
Firstly, we modify the conventional CORDIC algorithm to reduce its latency and area.
The proposed CORDIC algorithm is completely scale-free for the range of convergence that spans the entire coordinate space.
Secondly, we realize the window functions using a single CORDIC processor as against two serially connected CORDIC processors in existing technique, thus optimizing it for area and latency.
The linear CORDIC processor is replaced by a shift-add network which drastically reduces the number of pipelining stages required in the existing design.
The proposed design on an average requires approximately 64% less pipeline stages and saves up to 44.2% area.
Currently, the processor is designed to implement Blackman windowing architecture, which with slight modifications can be extended to other widow functions as well.
The details of the proposed architecture are discussed in the paper.
American Psychological Association (APA)
Aggarwal, Supriya& Khare, Kavita. 2012. Redesigned-Scale-Free CORDIC Algorithm Based FPGA Implementation of Window Functions to Minimize Area and Latency. International Journal of Reconfigurable Computing،Vol. 2012, no. 2012, pp.1-8.
https://search.emarefa.net/detail/BIM-452814
Modern Language Association (MLA)
Aggarwal, Supriya& Khare, Kavita. Redesigned-Scale-Free CORDIC Algorithm Based FPGA Implementation of Window Functions to Minimize Area and Latency. International Journal of Reconfigurable Computing No. 2012 (2012), pp.1-8.
https://search.emarefa.net/detail/BIM-452814
American Medical Association (AMA)
Aggarwal, Supriya& Khare, Kavita. Redesigned-Scale-Free CORDIC Algorithm Based FPGA Implementation of Window Functions to Minimize Area and Latency. International Journal of Reconfigurable Computing. 2012. Vol. 2012, no. 2012, pp.1-8.
https://search.emarefa.net/detail/BIM-452814
Data Type
Journal Articles
Language
English
Notes
Includes bibliographical references
Record ID
BIM-452814