A Robust Low-Voltage On-Chip LDO Voltage Regulator in 180 nm
Joint Authors
Krishna Prasad, K. S. R.
Patri, Sreehari Rao
Source
Issue
Vol. 2008, Issue 2008 (31 Dec. 2008), pp.1-7, 7 p.
Publisher
Hindawi Publishing Corporation
Publication Date
2008-12-21
Country of Publication
Egypt
No. of Pages
7
Main Subjects
Engineering Sciences and Information Technology
Abstract EN
This paper proposes a capacitor-less LDO with improved steady-state response and reduced transient overshoots and undershoots.
The novelty in this approach is that the regulation is improved to a greater extent by the improved error amplifier in addition to improved transient response against five vital process corners.
Also entire quiescent current required is kept below 100 μA.
This LDO voltage regulator provides a constant 1.2 V output voltage against all load currents from zero to 50 mA with a maximum voltage drop of 200 mV.
It is designed and tested using Spectre, targeted to be fabricated on UMC 180 nm.
American Psychological Association (APA)
Patri, Sreehari Rao& Krishna Prasad, K. S. R.. 2008. A Robust Low-Voltage On-Chip LDO Voltage Regulator in 180 nm. VLSI Design،Vol. 2008, no. 2008, pp.1-7.
https://search.emarefa.net/detail/BIM-458164
Modern Language Association (MLA)
Patri, Sreehari Rao& Krishna Prasad, K. S. R.. A Robust Low-Voltage On-Chip LDO Voltage Regulator in 180 nm. VLSI Design No. 2008 (2008), pp.1-7.
https://search.emarefa.net/detail/BIM-458164
American Medical Association (AMA)
Patri, Sreehari Rao& Krishna Prasad, K. S. R.. A Robust Low-Voltage On-Chip LDO Voltage Regulator in 180 nm. VLSI Design. 2008. Vol. 2008, no. 2008, pp.1-7.
https://search.emarefa.net/detail/BIM-458164
Data Type
Journal Articles
Language
English
Notes
Includes bibliographical references
Record ID
BIM-458164
