Device and Circuit Design Challenges in the Digital Subthreshold Region for Ultralow-Power Applications
Joint Authors
Agarwal, R. P.
Vaddi, Ramesh
Dasgupta, S.
Source
Issue
Vol. 2009, Issue 2009 (31 Dec. 2009), pp.1-14, 14 p.
Publisher
Hindawi Publishing Corporation
Publication Date
2009-04-22
Country of Publication
Egypt
No. of Pages
14
Main Subjects
Engineering Sciences and Information Technology
Abstract EN
In recent years, subthreshold operation has gained a lot of attention due to ultra low-power consumption in applications requiring low to medium performance.
It has also been shown that by optimizing the device structure, power consumption of digital subthreshold logic can be further minimized while improving its performance.
Therefore, subthreshold circuit design is very promising for future ultra low-energy sensor applications as well as high-performance parallel processing.
This paper deals with various device and circuit design challenges associated with the state of the art in optimal digital subthreshold circuit design and reviews device design methodologies and circuit topologies for optimal digital subthreshold operation.
This paper identifies the suitable candidates for subthreshold operation at device and circuit levels for optimal subthreshold circuit design and provides an effective roadmap for digital designers interested to work with ultra low-power applications.
American Psychological Association (APA)
Vaddi, Ramesh& Dasgupta, S.& Agarwal, R. P.. 2009. Device and Circuit Design Challenges in the Digital Subthreshold Region for Ultralow-Power Applications. VLSI Design،Vol. 2009, no. 2009, pp.1-14.
https://search.emarefa.net/detail/BIM-460214
Modern Language Association (MLA)
Vaddi, Ramesh…[et al.]. Device and Circuit Design Challenges in the Digital Subthreshold Region for Ultralow-Power Applications. VLSI Design No. 2009 (2009), pp.1-14.
https://search.emarefa.net/detail/BIM-460214
American Medical Association (AMA)
Vaddi, Ramesh& Dasgupta, S.& Agarwal, R. P.. Device and Circuit Design Challenges in the Digital Subthreshold Region for Ultralow-Power Applications. VLSI Design. 2009. Vol. 2009, no. 2009, pp.1-14.
https://search.emarefa.net/detail/BIM-460214
Data Type
Journal Articles
Language
English
Notes
Includes bibliographical references
Record ID
BIM-460214