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AADL Extension to Model Classical FPGA and FPGA Embedded within a SoC
Joint Authors
Chillet, Daniel
Blouin, Dominique
Senn, Eric
Bilavarn, Sébastien
Samoyeau, Christian
Bonamy, Robin
Source
International Journal of Reconfigurable Computing
Issue
Vol. 2011, Issue 2011 (31 Dec. 2011), pp.1-15, 15 p.
Publisher
Hindawi Publishing Corporation
Publication Date
2011-09-11
Country of Publication
Egypt
No. of Pages
15
Main Subjects
Information Technology and Computer Science
Abstract EN
With the evolution of technology, the system complexity increased and the application fields of the embedded system expanded.
Current applications need a high degree of performance, flexibility, and efficient development environments.
Today, reconfigurable logic allows to meet the on-chip processing requirements with new benefits resulting from partial and dynamic reconfiguration.
But the dimension introduced in the design of these systems requires more abstraction to manage their complexity and efficient models to provide reliable preliminary estimations.
While classical multiprocessor systems can be modeled without difficulty, the use of partial run-time reconfiguration in heterogeneous flexible system-on-chips is generally not covered.
The contribution of this paper is to address this with an extension of the AADL language able to model the reconfigurable logic, possibly considering dynamic reconfiguration and power consumption requirements.
The proposed AADL model is divided into three levels to provide a generic and hierarchical approach separating the static and dynamic parts of current FPGAs.
These levels are exposed in detail and illustrated on a concrete example of FPGA device.
The design space exploration of an application deployment using this model is also presented.
American Psychological Association (APA)
Blouin, Dominique& Chillet, Daniel& Senn, Eric& Bilavarn, Sébastien& Bonamy, Robin& Samoyeau, Christian. 2011. AADL Extension to Model Classical FPGA and FPGA Embedded within a SoC. International Journal of Reconfigurable Computing،Vol. 2011, no. 2011, pp.1-15.
https://search.emarefa.net/detail/BIM-471180
Modern Language Association (MLA)
Blouin, Dominique…[et al.]. AADL Extension to Model Classical FPGA and FPGA Embedded within a SoC. International Journal of Reconfigurable Computing No. 2011 (2011), pp.1-15.
https://search.emarefa.net/detail/BIM-471180
American Medical Association (AMA)
Blouin, Dominique& Chillet, Daniel& Senn, Eric& Bilavarn, Sébastien& Bonamy, Robin& Samoyeau, Christian. AADL Extension to Model Classical FPGA and FPGA Embedded within a SoC. International Journal of Reconfigurable Computing. 2011. Vol. 2011, no. 2011, pp.1-15.
https://search.emarefa.net/detail/BIM-471180
Data Type
Journal Articles
Language
English
Notes
Includes bibliographical references
Record ID
BIM-471180