A Hardware-Accelerated ECDLP with High-Performance Modular Multiplication
Joint Authors
Mane, Suvarna
Judge, Lyndon
Schaumont, Patrick R.
Source
International Journal of Reconfigurable Computing
Issue
Vol. 2012, Issue 2012 (31 Dec. 2012), pp.1-14, 14 p.
Publisher
Hindawi Publishing Corporation
Publication Date
2012-11-28
Country of Publication
Egypt
No. of Pages
14
Main Subjects
Information Technology and Computer Science
Abstract EN
Elliptic curve cryptography (ECC) has become a popular public key cryptography standard.
The security of ECC is due to the difficulty of solving the elliptic curve discrete logarithm problem (ECDLP).
In this paper, we demonstrate a successful attack on ECC over prime field using the Pollard rho algorithm implemented on a hardware-software cointegrated platform.
We propose a high-performance architecture for multiplication over prime field using specialized DSP blocks in the FPGA.
We characterize this architecture by exploring the design space to determine the optimal integer basis for polynomial representation and we demonstrate an efficient mapping of this design to multiple standard prime field elliptic curves.
We use the resulting modular multiplier to demonstrate low-latency multiplications for curves secp112r1 and P-192.
We apply our modular multiplier to implement a complete attack on secp112r1 using a Nallatech FSB-Compute platform with Virtex-5 FPGA.
The measured performance of the resulting design is 114 cycles per Pollard rho step at 100 MHz, which gives 878 K iterations per second per ECC core.
We extend this design to a multicore ECDLP implementation that achieves 14.05 M iterations per second with 16 parallel point addition cores.
American Psychological Association (APA)
Judge, Lyndon& Mane, Suvarna& Schaumont, Patrick R.. 2012. A Hardware-Accelerated ECDLP with High-Performance Modular Multiplication. International Journal of Reconfigurable Computing،Vol. 2012, no. 2012, pp.1-14.
https://search.emarefa.net/detail/BIM-472399
Modern Language Association (MLA)
Judge, Lyndon…[et al.]. A Hardware-Accelerated ECDLP with High-Performance Modular Multiplication. International Journal of Reconfigurable Computing No. 2012 (2012), pp.1-14.
https://search.emarefa.net/detail/BIM-472399
American Medical Association (AMA)
Judge, Lyndon& Mane, Suvarna& Schaumont, Patrick R.. A Hardware-Accelerated ECDLP with High-Performance Modular Multiplication. International Journal of Reconfigurable Computing. 2012. Vol. 2012, no. 2012, pp.1-14.
https://search.emarefa.net/detail/BIM-472399
Data Type
Journal Articles
Language
English
Notes
Includes bibliographical references
Record ID
BIM-472399