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Homogeneous and Heterogeneous MPSoC Architectures with Network-On-Chip Connectivity for Low-Power and Real-Time Multimedia Signal Processing
Joint Authors
Source
Issue
Vol. 2012, Issue 2012 (31 Dec. 2012), pp.1-17, 17 p.
Publisher
Hindawi Publishing Corporation
Publication Date
2012-08-14
Country of Publication
Egypt
No. of Pages
17
Main Subjects
Engineering Sciences and Information Technology
Abstract EN
Two multiprocessor system-on-chip (MPSoC) architectures are proposed and compared in the paper with reference to audio and video processing applications.
One architecture exploits a homogeneous topology; it consists of 8 identical tiles, each made of a 32-bit RISC core enhanced by a 64-bit DSP coprocessor with local memory.
The other MPSoC architecture exploits a heterogeneous-tile topology with on-chip distributed memory resources; the tiles act as application specific processors supporting a different class of algorithms.
In both architectures, the multiple tiles are interconnected by a network-on-chip (NoC) infrastructure, through network interfaces and routers, which allows parallel operations of the multiple tiles.
The functional performances and the implementation complexity of the NoC-based MPSoC architectures are assessed by synthesis results in submicron CMOS technology.
Among the large set of supported algorithms, two case studies are considered: the real-time implementation of an H.264/MPEG AVC video codec and of a low-distortion digital audio amplifier.
The heterogeneous architecture ensures a higher power efficiency and a smaller area occupation and is more suited for low-power multimedia processing, such as in mobile devices.
The homogeneous scheme allows for a higher flexibility and easier system scalability and is more suited for general-purpose DSP tasks in power-supplied devices.
American Psychological Association (APA)
Saponara, Sergio& Fanucci, Luca. 2012. Homogeneous and Heterogeneous MPSoC Architectures with Network-On-Chip Connectivity for Low-Power and Real-Time Multimedia Signal Processing. VLSI Design،Vol. 2012, no. 2012, pp.1-17.
https://search.emarefa.net/detail/BIM-472525
Modern Language Association (MLA)
Saponara, Sergio& Fanucci, Luca. Homogeneous and Heterogeneous MPSoC Architectures with Network-On-Chip Connectivity for Low-Power and Real-Time Multimedia Signal Processing. VLSI Design No. 2012 (2012), pp.1-17.
https://search.emarefa.net/detail/BIM-472525
American Medical Association (AMA)
Saponara, Sergio& Fanucci, Luca. Homogeneous and Heterogeneous MPSoC Architectures with Network-On-Chip Connectivity for Low-Power and Real-Time Multimedia Signal Processing. VLSI Design. 2012. Vol. 2012, no. 2012, pp.1-17.
https://search.emarefa.net/detail/BIM-472525
Data Type
Journal Articles
Language
English
Notes
Includes bibliographical references
Record ID
BIM-472525