An FFT Core for DVB-TDVB-H Receivers

Joint Authors

Cortés, A.
Sevillano, J. F.
Vélez, I.
Irizar, A.
Zalbide, I.

Source

VLSI Design

Issue

Vol. 2008, Issue 2008 (31 Dec. 2008), pp.1-9, 9 p.

Publisher

Hindawi Publishing Corporation

Publication Date

2008-03-27

Country of Publication

Egypt

No. of Pages

9

Main Subjects

Engineering Sciences and Information Technology

Abstract EN

This paper presents the design and implementation of a 2K/4K/8K multiple mode FFT core for DVB-T/DVB-H receivers.

The proposed core is based on a pipeline radix-22 SDF architecture.

The necessary changes in the radix-22 SDF architecture to achieve an efficient FFT implementation are detailed.

Quantization effects and timing design parameters are analyzed for DVB-T/DVB-H.

Area and power results are provided for the proposed core.

American Psychological Association (APA)

Cortés, A.& Vélez, I.& Zalbide, I.& Irizar, A.& Sevillano, J. F.. 2008. An FFT Core for DVB-TDVB-H Receivers. VLSI Design،Vol. 2008, no. 2008, pp.1-9.
https://search.emarefa.net/detail/BIM-484945

Modern Language Association (MLA)

Cortés, A.…[et al.]. An FFT Core for DVB-TDVB-H Receivers. VLSI Design No. 2008 (2008), pp.1-9.
https://search.emarefa.net/detail/BIM-484945

American Medical Association (AMA)

Cortés, A.& Vélez, I.& Zalbide, I.& Irizar, A.& Sevillano, J. F.. An FFT Core for DVB-TDVB-H Receivers. VLSI Design. 2008. Vol. 2008, no. 2008, pp.1-9.
https://search.emarefa.net/detail/BIM-484945

Data Type

Journal Articles

Language

English

Notes

Includes bibliographical references

Record ID

BIM-484945