Boundary Surface of 5-Valued Memory

Abstract EN

The subject of research in this paper is multiple-valued (MV) memory cell—particularly the morphology of boundary surface of five-valued memory.

By accepting the values of parasitic accumulation elements on the chip, very complicated morphology of the boundary surfaces occurs, which separates various attractors from each other.

This is due to the occurrence of undesirable oscillations—a stable limit cycles, which makes it impossible to control memory.

These dynamic attractors are so dominant that their regions of attraction even surround regions of attraction of static attractors—required logic levels of memory.

Therefore, in the realization of the MV memory on the chip is necessary to know the values of the parasitic elements, because their presence may cause a malfunction of the memory.

In this case, only calculation and displaying the boundary surface provides exact answers related to operation of the MV memory.