Area Optimisation for Field-Programmable Gate Arrays in SystemC Hardware Compilation
Joint Authors
McKeever, Steve
Wilson, Alex
Ditmar, Johan
Source
International Journal of Reconfigurable Computing
Issue
Vol. 2008, Issue 2008 (31 Dec. 2008), pp.1-14, 14 p.
Publisher
Hindawi Publishing Corporation
Publication Date
2008-11-26
Country of Publication
Egypt
No. of Pages
14
Main Subjects
Information Technology and Computer Science
Abstract EN
This paper discusses a pair of synthesis algorithms that optimise a SystemC design to minimise area when targeting FPGAs.
Each can significantly improve the synthesis of a high-level language construct, thus allowing a designer to concentrate more on an algorithm description and less on hardware-specific implementation details.
The first algorithm is a source-level transformation implementing function exlining—where a separate block of hardware implements a function and is shared between multiple calls to the function.
The second is a novel algorithm for mapping arrays to memories which involves assigning array accesses to memory ports such that no port is ever accessed more than once in a clock cycle.
This algorithm assigns accesses to read/write only ports and read-write ports concurrently, solving the assignment problem more efficiently for a wider range of memories compared to existing methods.
Both optimisations operate on a high-level program representation and have been implemented in a commercial SystemC compiler.
Experiments show that in suitable circumstances these techniques result in significant reductions in logic utilisation for FPGAs.
American Psychological Association (APA)
Ditmar, Johan& McKeever, Steve& Wilson, Alex. 2008. Area Optimisation for Field-Programmable Gate Arrays in SystemC Hardware Compilation. International Journal of Reconfigurable Computing،Vol. 2008, no. 2008, pp.1-14.
https://search.emarefa.net/detail/BIM-489500
Modern Language Association (MLA)
Ditmar, Johan…[et al.]. Area Optimisation for Field-Programmable Gate Arrays in SystemC Hardware Compilation. International Journal of Reconfigurable Computing No. 2008 (2008), pp.1-14.
https://search.emarefa.net/detail/BIM-489500
American Medical Association (AMA)
Ditmar, Johan& McKeever, Steve& Wilson, Alex. Area Optimisation for Field-Programmable Gate Arrays in SystemC Hardware Compilation. International Journal of Reconfigurable Computing. 2008. Vol. 2008, no. 2008, pp.1-14.
https://search.emarefa.net/detail/BIM-489500
Data Type
Journal Articles
Language
English
Notes
Includes bibliographical references
Record ID
BIM-489500