Task-Level Data Model for Hardware Synthesis Based on Concurrent Collections

Joint Authors

Zhang, Peng
Gururaj, Karthik
Zou, Yi
Cong, Jason

Source

Journal of Electrical and Computer Engineering

Issue

Vol. 2012, Issue 2012 (31 Dec. 2012), pp.1-24, 24 p.

Publisher

Hindawi Publishing Corporation

Publication Date

2012-05-10

Country of Publication

Egypt

No. of Pages

24

Main Subjects

Engineering Sciences and Information Technology
Information Technology and Computer Science

Abstract EN

The ever-increasing design complexity of modern digital systems makes it necessary to develop electronic system-level (ESL) methodologies with automation and optimization in the higher abstraction level.

How the concurrency is modeled in the application specification plays a significant role in ESL design frameworks.

The state-of-art concurrent specification models are not suitable for modeling task-level concurrent behavior for the hardware synthesis design flow.

Based on the concurrent collection (CnC) model, which provides the maximum freedom of task rescheduling, we propose task-level data model (TLDM), targeted at the task-level optimization in hardware synthesis for data processing applications.

Polyhedral models are embedded in TLDM for concise expression of task instances, array accesses, and dependencies.

Examples are shown to illustrate the advantages of our TLDM specification compared to other widely used concurrency specifications.

American Psychological Association (APA)

Cong, Jason& Gururaj, Karthik& Zhang, Peng& Zou, Yi. 2012. Task-Level Data Model for Hardware Synthesis Based on Concurrent Collections. Journal of Electrical and Computer Engineering،Vol. 2012, no. 2012, pp.1-24.
https://search.emarefa.net/detail/BIM-490962

Modern Language Association (MLA)

Cong, Jason…[et al.]. Task-Level Data Model for Hardware Synthesis Based on Concurrent Collections. Journal of Electrical and Computer Engineering No. 2012 (2012), pp.1-24.
https://search.emarefa.net/detail/BIM-490962

American Medical Association (AMA)

Cong, Jason& Gururaj, Karthik& Zhang, Peng& Zou, Yi. Task-Level Data Model for Hardware Synthesis Based on Concurrent Collections. Journal of Electrical and Computer Engineering. 2012. Vol. 2012, no. 2012, pp.1-24.
https://search.emarefa.net/detail/BIM-490962

Data Type

Journal Articles

Language

English

Notes

Includes bibliographical references

Record ID

BIM-490962