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The Coarse-GrainedFine-Grained Logic Interface in FPGAs with Embedded Floating-Point Arithmetic Units
Joint Authors
Leong, Philip H. W.
Luk, Wayne
Lamoureux, Julien
Yu, Chi Wai
Wilton, Steven J. E.
Source
International Journal of Reconfigurable Computing
Issue
Vol. 2008, Issue 2008 (31 Dec. 2008), pp.1-10, 10 p.
Publisher
Hindawi Publishing Corporation
Publication Date
2009-02-25
Country of Publication
Egypt
No. of Pages
10
Main Subjects
Information Technology and Computer Science
Abstract EN
This paper examines the interface between fine-grained and coarse-grained programmable logic in FPGAs.
Specifically, it presents an empirical study that covers the location, pin arrangement, and interconnect between embedded floating point units (FPUs) and the fine-grained logic fabric in FPGAs.
It also studies this interface in FPGAs which contain both FPUs and embedded memories.
The results show that (1) FPUs should have a square aspect ratio; (2) they should be positioned near the center of the FPGA; (3) their I/O pins should be arranged around all four sides of the FPU; (4) embedded memory should be located between the FPUs; and (5) connecting higher I/O density coarse-grained blocks increases the demand for routing resources.
The hybrid FPGAs with embedded memory required 12% wider channels than the case where embedded memory is not used.
American Psychological Association (APA)
Yu, Chi Wai& Lamoureux, Julien& Wilton, Steven J. E.& Leong, Philip H. W.& Luk, Wayne. 2009. The Coarse-GrainedFine-Grained Logic Interface in FPGAs with Embedded Floating-Point Arithmetic Units. International Journal of Reconfigurable Computing،Vol. 2008, no. 2008, pp.1-10.
https://search.emarefa.net/detail/BIM-494574
Modern Language Association (MLA)
Yu, Chi Wai…[et al.]. The Coarse-GrainedFine-Grained Logic Interface in FPGAs with Embedded Floating-Point Arithmetic Units. International Journal of Reconfigurable Computing No. 2008 (2008), pp.1-10.
https://search.emarefa.net/detail/BIM-494574
American Medical Association (AMA)
Yu, Chi Wai& Lamoureux, Julien& Wilton, Steven J. E.& Leong, Philip H. W.& Luk, Wayne. The Coarse-GrainedFine-Grained Logic Interface in FPGAs with Embedded Floating-Point Arithmetic Units. International Journal of Reconfigurable Computing. 2009. Vol. 2008, no. 2008, pp.1-10.
https://search.emarefa.net/detail/BIM-494574
Data Type
Journal Articles
Language
English
Notes
Includes bibliographical references
Record ID
BIM-494574