NCOR : An FPGA-Friendly Nonblocking Data Cache for Soft Processors with Runahead Execution
Joint Authors
Moshovos, Andreas
Aasaraai, Kaveh
Source
International Journal of Reconfigurable Computing
Issue
Vol. 2012, Issue 2012 (31 Dec. 2012), pp.1-12, 12 p.
Publisher
Hindawi Publishing Corporation
Publication Date
2011-11-29
Country of Publication
Egypt
No. of Pages
12
Main Subjects
Information Technology and Computer Science
Abstract EN
Soft processors often use data caches to reduce the gap between processor and main memory speeds.
To achieve high efficiency, simple, blocking caches are used.
Such caches are not appropriate for processor designs such as Runahead and out-of-order execution that require nonblocking caches to tolerate main memory latencies.
Instead, these processors use non-blocking caches to extract memory level parallelism and improve performance.
However, conventional non-blocking cache designs are expensive and slow on FPGAs as they use content-addressable memories (CAMs).
This work proposes NCOR, an FPGA-friendly non-blocking cache that exploits the key properties of Runahead execution.
NCOR does not require CAMs and utilizes smart cache controllers.
A 4 KB NCOR operates at 329 MHz on Stratix III FPGAs while it uses only 270 logic elements.
A 32 KB NCOR operates at 278 Mhz and uses 269 logic elements.
American Psychological Association (APA)
Aasaraai, Kaveh& Moshovos, Andreas. 2011. NCOR : An FPGA-Friendly Nonblocking Data Cache for Soft Processors with Runahead Execution. International Journal of Reconfigurable Computing،Vol. 2012, no. 2012, pp.1-12.
https://search.emarefa.net/detail/BIM-507742
Modern Language Association (MLA)
Aasaraai, Kaveh& Moshovos, Andreas. NCOR : An FPGA-Friendly Nonblocking Data Cache for Soft Processors with Runahead Execution. International Journal of Reconfigurable Computing No. 2012 (2012), pp.1-12.
https://search.emarefa.net/detail/BIM-507742
American Medical Association (AMA)
Aasaraai, Kaveh& Moshovos, Andreas. NCOR : An FPGA-Friendly Nonblocking Data Cache for Soft Processors with Runahead Execution. International Journal of Reconfigurable Computing. 2011. Vol. 2012, no. 2012, pp.1-12.
https://search.emarefa.net/detail/BIM-507742
Data Type
Journal Articles
Language
English
Notes
Includes bibliographical references
Record ID
BIM-507742