VHDL implementation of hybrid block cipher method (SRC)‎

Abstract EN

This paper discusses the hardware design of the hybrid block cipher method that combines the RC6 cipher and the Serpent cipher.

The block size is 128 bits, and the key can be any length up to 256 bytes.

This algorithm is designed to take advantage of the powerful, which is supported by RC6 and Serpent encryption algorithms with overcoming their weaknesses, resulting in a much improved security / performance trade off over existing ciphers.

The discussion addresses hardware design and VHDL implementation of the key expansion algorithm and the encryption algorithm.