A new 2D mesh routing approach for networks on chip

Abstract EN

Traditionally, embedded systems and digital electronics technology were confined to computer systems.

Today, embedded systems and systems on chip are applied in a wide range of areas such as television, communication systems, radar, military systems, medical instrumentation, and consumer electronics use digital techniques.

The interconnection between these systems blocks is one of the biggest development challenges.

Network on Chip (NoC) is a new interconnection structure that is used for Systems on Chip (SoCs).

It is come to replace classic interconnections and to solve its problems.

NoC structure provides a high performance, scalable and power efficient communication infrastructure for connecting SoCs modules.

In this paper, we propose a new approach for routing in a 2D mesh topology NoC.

This approach is based on a combination between a placement strategy, a modified XY routing and a communication load-based clustering technique.

We show that our approach provides a better latency and an enhanced resources consumption than in the most notable existing routing technique.