A worst case execution time (WCET)‎ estimation algorithm for low-leakage very long instruction word (VLIW)‎ processors

Abstract EN

This paper proposes a Worst Case Execution Time (WCET) estimation algorithm for programs running on a very long instruction word (VLIW) processor with a decayed first-level instruction cache.

It refines the static cache simulation technique to set an upper limit on the execution time of a program in the presence of the cache decay technique.

Simulation results on standard real-time benchmarks have shown that the proposed algorithm can accurately estimate the WCET (close to 100% accuracy) for programs with single execution path.

On the other hand, for programs with multiple control-flow paths, the proposed algorithm was able to reasonably bound the WCET but with less degree of accuracy as compared to programs with a single execution path.