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Design and implementation of decimation filter for 13-bit sigma-delta ADC based on FPGA
Other Title(s)
تصميم و تنفيذ مرشح القاتل للمحول التناظري إلى رقمي نوع سيكما دلتا بدقة bit 13 باستخدام البوابات القابلة للبرمجة حقليا
Joint Authors
Dawud, Muhammad Idris
Muhammad, Khalid Khalil
Source
Tikrit Journal of Engineering Sciences
Issue
Vol. 23, Issue 2 (30 Jun. 2016), pp.21-28, 8 p.
Publisher
Tikrit University Colleg of Engineering
Publication Date
2016-06-30
Country of Publication
Iraq
No. of Pages
8
Main Subjects
Information Technology and Computer Science
Abstract EN
A 13 bit Sigma-Delta ADC for a signal band of 40K Hz is designed in MATLAB Simulink and then implemented using Xilinx system generator tool.
The first order Sigma-Delta modulator is designed to work at a signal band of 40 KHz at an oversampling ratio (OSR) of 256 with a sampling frequency of 20.48 MHz.
The proposed decimation filter design is consists of a second order Cascaded Integrator Comb filter (CIC) followed by two finite impulse response (FIR) filters.
This architecture reduces the need for multiplication which is need very large area.
This architecture implements a decimation ratio of 256 and allows a maximum resolution of 13 bits in the output of the filter.
The decimation filter was designed and tested in Xilinx system generator tool which reduces the design cycle by directly generating efficient VHDL code.
The results obtained show that the overall Sigma-Delta ADC is able to achieve an ENOB (Effective Number Of Bit) of 13.71 bits and SNR of 84.3 dB.
American Psychological Association (APA)
Muhammad, Khalid Khalil& Dawud, Muhammad Idris. 2016. Design and implementation of decimation filter for 13-bit sigma-delta ADC based on FPGA. Tikrit Journal of Engineering Sciences،Vol. 23, no. 2, pp.21-28.
https://search.emarefa.net/detail/BIM-936919
Modern Language Association (MLA)
Muhammad, Khalid Khalil& Dawud, Muhammad Idris. Design and implementation of decimation filter for 13-bit sigma-delta ADC based on FPGA. Tikrit Journal of Engineering Sciences Vol. 23, no. 2 (2016), pp.21-28.
https://search.emarefa.net/detail/BIM-936919
American Medical Association (AMA)
Muhammad, Khalid Khalil& Dawud, Muhammad Idris. Design and implementation of decimation filter for 13-bit sigma-delta ADC based on FPGA. Tikrit Journal of Engineering Sciences. 2016. Vol. 23, no. 2, pp.21-28.
https://search.emarefa.net/detail/BIM-936919
Data Type
Journal Articles
Language
English
Record ID
BIM-936919