An optimized multiplierless hardware design of fast 2-D DCT IDCT for image video coding
المؤلفون المشاركون
al-Akif, Muhammad
Belkouch, Said
Husni, Muha Murabit
المصدر
العدد
المجلد 10، العدد 1 (31 مارس/آذار 2014)، ص ص. 78-92، 15ص.
الناشر
تاريخ النشر
2014-03-31
دولة النشر
الجزائر
عدد الصفحات
15
التخصصات الرئيسية
الموضوعات
الملخص EN
The Two-Dimensional Discrete Cosine Transform / Inverse Discrete Cosine Transform (2-D DCT/IDCT) is a key algorithm in image and video coding applications.
Therefore, the optimization of its hardware implementation requires low complexity design.
For this purpose, a possible solution is to avoid multiplications and to replace them by additions and shifts, while meeting the requirement of real time applications.
In this paper, an optimized design for a multiplierless hardware implementation of fast 2-D DCT/IDCT based on modified Loeffler algorithm is achieved, in which a new approach is used to reduce the amount of additions and shift operators.
This approach is based on the combination of three representations of constant coefficient multiplications: natural binary, canonic signed digit (CSD) and a new signed digit representation.
The optimized 1-D DCT/IDCT design is developed, by selecting for each constant coefficient multiplication the suitable representation method that allows simultaneously a maximum frequency operation and a minimum number of additions and shift operators.
The hardware implementation of 2-D DCT/IDCT is performed with the optimized 1-D DCT/IDCT design and a robust transpose buffer.
All these pipelined hardware implementations are described in VHDL hardware language, synthesized and implemented on low cost FPGA.
This proposed 2-D DCT/IDCT design reduces the computational complexity compared to other previous designs.
The implementation results of the proposed 2-D DCT/IDCT show an increase of the maximum frequency by 14% and a decrease of resources usage by 18.5% in comparison with previous design based on modified Loeffler algorithm.
نمط استشهاد جمعية علماء النفس الأمريكية (APA)
al-Akif, Muhammad& Belkouch, Said& Husni, Muha Murabit. 2014. An optimized multiplierless hardware design of fast 2-D DCT IDCT for image video coding. Journal of Electrical Systems،Vol. 10, no. 1, pp.78-92.
https://search.emarefa.net/detail/BIM-356920
نمط استشهاد الجمعية الأمريكية للغات الحديثة (MLA)
Husni, Muha Murabit…[et al.]. An optimized multiplierless hardware design of fast 2-D DCT IDCT for image video coding. Journal of Electrical Systems Vol. 10, no. 1 (Mar. 2014), pp.78-92.
https://search.emarefa.net/detail/BIM-356920
نمط استشهاد الجمعية الطبية الأمريكية (AMA)
al-Akif, Muhammad& Belkouch, Said& Husni, Muha Murabit. An optimized multiplierless hardware design of fast 2-D DCT IDCT for image video coding. Journal of Electrical Systems. 2014. Vol. 10, no. 1, pp.78-92.
https://search.emarefa.net/detail/BIM-356920
نوع البيانات
مقالات
لغة النص
الإنجليزية
الملاحظات
Includes bibliographical references : p. 91-92
رقم السجل
BIM-356920
قاعدة معامل التأثير والاستشهادات المرجعية العربي "ارسيف Arcif"
أضخم قاعدة بيانات عربية للاستشهادات المرجعية للمجلات العلمية المحكمة الصادرة في العالم العربي
تقوم هذه الخدمة بالتحقق من التشابه أو الانتحال في الأبحاث والمقالات العلمية والأطروحات الجامعية والكتب والأبحاث باللغة العربية، وتحديد درجة التشابه أو أصالة الأعمال البحثية وحماية ملكيتها الفكرية. تعرف اكثر