Object Recognition and Pose Estimation on Embedded Hardware : SURF-Based System Designs Accelerated by FPGA Logic

المؤلفون المشاركون

Kiefer, Gundolf
Hornung, Ulrich
Schaeferling, Michael

المصدر

International Journal of Reconfigurable Computing

العدد

المجلد 2012، العدد 2012 (31 ديسمبر/كانون الأول 2012)، ص ص. 1-16، 16ص.

الناشر

Hindawi Publishing Corporation

تاريخ النشر

2012-12-06

دولة النشر

مصر

عدد الصفحات

16

التخصصات الرئيسية

تكنولوجيا المعلومات وعلم الحاسوب

الملخص EN

State-of-the-art object recognition and pose estimation systems often utilize point feature algorithms, which in turn usually require the computing power of conventional PC hardware.

In this paper, we describe two embedded systems for object detection and pose estimation using sophisticated point features.

The feature detection step of the “Speeded-up Robust Features (SURF)” algorithm is accelerated by a special IP core.

The first system performs object detection and is completely implemented in a single medium-size Virtex-5 FPGA.

The second system is an augmented reality platform, which consists of an ARM-based microcontroller and intelligent FPGA-based cameras which support the main system.

نمط استشهاد جمعية علماء النفس الأمريكية (APA)

Schaeferling, Michael& Hornung, Ulrich& Kiefer, Gundolf. 2012. Object Recognition and Pose Estimation on Embedded Hardware : SURF-Based System Designs Accelerated by FPGA Logic. International Journal of Reconfigurable Computing،Vol. 2012, no. 2012, pp.1-16.
https://search.emarefa.net/detail/BIM-466447

نمط استشهاد الجمعية الأمريكية للغات الحديثة (MLA)

Schaeferling, Michael…[et al.]. Object Recognition and Pose Estimation on Embedded Hardware : SURF-Based System Designs Accelerated by FPGA Logic. International Journal of Reconfigurable Computing No. 2012 (2012), pp.1-16.
https://search.emarefa.net/detail/BIM-466447

نمط استشهاد الجمعية الطبية الأمريكية (AMA)

Schaeferling, Michael& Hornung, Ulrich& Kiefer, Gundolf. Object Recognition and Pose Estimation on Embedded Hardware : SURF-Based System Designs Accelerated by FPGA Logic. International Journal of Reconfigurable Computing. 2012. Vol. 2012, no. 2012, pp.1-16.
https://search.emarefa.net/detail/BIM-466447

نوع البيانات

مقالات

لغة النص

الإنجليزية

الملاحظات

Includes bibliographical references

رقم السجل

BIM-466447