Object Recognition and Pose Estimation on Embedded Hardware : SURF-Based System Designs Accelerated by FPGA Logic

Joint Authors

Kiefer, Gundolf
Hornung, Ulrich
Schaeferling, Michael

Source

International Journal of Reconfigurable Computing

Issue

Vol. 2012, Issue 2012 (31 Dec. 2012), pp.1-16, 16 p.

Publisher

Hindawi Publishing Corporation

Publication Date

2012-12-06

Country of Publication

Egypt

No. of Pages

16

Main Subjects

Information Technology and Computer Science

Abstract EN

State-of-the-art object recognition and pose estimation systems often utilize point feature algorithms, which in turn usually require the computing power of conventional PC hardware.

In this paper, we describe two embedded systems for object detection and pose estimation using sophisticated point features.

The feature detection step of the “Speeded-up Robust Features (SURF)” algorithm is accelerated by a special IP core.

The first system performs object detection and is completely implemented in a single medium-size Virtex-5 FPGA.

The second system is an augmented reality platform, which consists of an ARM-based microcontroller and intelligent FPGA-based cameras which support the main system.

American Psychological Association (APA)

Schaeferling, Michael& Hornung, Ulrich& Kiefer, Gundolf. 2012. Object Recognition and Pose Estimation on Embedded Hardware : SURF-Based System Designs Accelerated by FPGA Logic. International Journal of Reconfigurable Computing،Vol. 2012, no. 2012, pp.1-16.
https://search.emarefa.net/detail/BIM-466447

Modern Language Association (MLA)

Schaeferling, Michael…[et al.]. Object Recognition and Pose Estimation on Embedded Hardware : SURF-Based System Designs Accelerated by FPGA Logic. International Journal of Reconfigurable Computing No. 2012 (2012), pp.1-16.
https://search.emarefa.net/detail/BIM-466447

American Medical Association (AMA)

Schaeferling, Michael& Hornung, Ulrich& Kiefer, Gundolf. Object Recognition and Pose Estimation on Embedded Hardware : SURF-Based System Designs Accelerated by FPGA Logic. International Journal of Reconfigurable Computing. 2012. Vol. 2012, no. 2012, pp.1-16.
https://search.emarefa.net/detail/BIM-466447

Data Type

Journal Articles

Language

English

Notes

Includes bibliographical references

Record ID

BIM-466447