Comment on “High Efficiency Generalized Parallel Counters for Look-Up Table Based FPGAs”
Joint Authors
Source
International Journal of Reconfigurable Computing
Issue
Vol. 2016, Issue 2016 (31 Dec. 2016), pp.1-3, 3 p.
Publisher
Hindawi Publishing Corporation
Publication Date
2016-09-14
Country of Publication
Egypt
No. of Pages
3
Main Subjects
Information Technology and Computer Science
Abstract EN
This brief points out some problems when mapping the optimized GPCs using the heuristic of the paper above.
A thorough analysis revealed that a significant number of additional LUTs are required to route the signals when mapping the optimized designs on current FPGAs.
Taking these resources into account, the optimized GPCs require at least the same resources as previous state of the art.
American Psychological Association (APA)
Kumm, Martin& Zipf, Peter. 2016. Comment on “High Efficiency Generalized Parallel Counters for Look-Up Table Based FPGAs”. International Journal of Reconfigurable Computing،Vol. 2016, no. 2016, pp.1-3.
https://search.emarefa.net/detail/BIM-1106986
Modern Language Association (MLA)
Kumm, Martin& Zipf, Peter. Comment on “High Efficiency Generalized Parallel Counters for Look-Up Table Based FPGAs”. International Journal of Reconfigurable Computing No. 2016 (2016), pp.1-3.
https://search.emarefa.net/detail/BIM-1106986
American Medical Association (AMA)
Kumm, Martin& Zipf, Peter. Comment on “High Efficiency Generalized Parallel Counters for Look-Up Table Based FPGAs”. International Journal of Reconfigurable Computing. 2016. Vol. 2016, no. 2016, pp.1-3.
https://search.emarefa.net/detail/BIM-1106986
Data Type
Journal Articles
Language
English
Notes
Includes bibliographical references
Record ID
BIM-1106986
