Xilinx FPGA implementation of arithmetic logic shift unit (ALSU)‎

Abstract EN

A Field Programmable Gate Array (FPGA) is a digital integrated circuit that can be programmed to do any type of digital function.

This paper represents how to map the arithmetic logic shift unit (ALSU) to the Xilinx FPGA Chip.

The ALSU architecture was captured through the use of the VHDL hardware description language.

Xilinx Integrated Software Environment 1SF.

6.i (project navigator) CAD software package was used to synthesize and implement the architecture of the ALSU to the FPGA chip.

The architecture was functionally and performance validated through the package software simulation via post-synthesis and post-implementation software simulations.