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Xilinx FPGA implementation of arithmetic logic shift unit (ALSU)
Author
Source
Iraqi Journal of Computer, Communications and Control Engineering
Issue
Vol. 6, Issue 3 (31 Dec. 2006), pp.90-100, 11 p.
Publisher
Publication Date
2006-12-31
Country of Publication
Iraq
No. of Pages
11
Main Subjects
Information Technology and Computer Science
Topics
Abstract EN
A Field Programmable Gate Array (FPGA) is a digital integrated circuit that can be programmed to do any type of digital function.
This paper represents how to map the arithmetic logic shift unit (ALSU) to the Xilinx FPGA Chip.
The ALSU architecture was captured through the use of the VHDL hardware description language.
Xilinx Integrated Software Environment 1SF.
6.i (project navigator) CAD software package was used to synthesize and implement the architecture of the ALSU to the FPGA chip.
The architecture was functionally and performance validated through the package software simulation via post-synthesis and post-implementation software simulations.
American Psychological Association (APA)
Tawfiq, Raghad Zuhayr. 2006. Xilinx FPGA implementation of arithmetic logic shift unit (ALSU). Iraqi Journal of Computer, Communications and Control Engineering،Vol. 6, no. 3, pp.90-100.
https://search.emarefa.net/detail/BIM-279216
Modern Language Association (MLA)
Tawfiq, Raghad Zuhayr. Xilinx FPGA implementation of arithmetic logic shift unit (ALSU). Iraqi Journal of Computer, Communications and Control Engineering Vol. 6, no. 3 (Dec. 2006), pp.90-100.
https://search.emarefa.net/detail/BIM-279216
American Medical Association (AMA)
Tawfiq, Raghad Zuhayr. Xilinx FPGA implementation of arithmetic logic shift unit (ALSU). Iraqi Journal of Computer, Communications and Control Engineering. 2006. Vol. 6, no. 3, pp.90-100.
https://search.emarefa.net/detail/BIM-279216
Data Type
Journal Articles
Language
English
Notes
Includes appendices : p. 97-100
Record ID
BIM-279216