Design and simulation og high frequency low noisw amplifier

Dissertant

Wadi, Adi Isam

University

University of Technology

Faculty

-

Department

Department of Electrical Engineering

University Country

Iraq

Degree

Master

Degree Date

2004

English Abstract

This thesis is concerned with design and simulation of Low Noise Amplifier for mobile communication.

The minimization of noise figure and the miniature of required chip area for fabrication are the most important parameters to be investigated an optimization technique is applied to obtain the optimum structure parameter design values and to idea m i n i m u m noise factor.

A further modified new structure is developed to miniature the chip area required for the fabrication of the amp 1.

Electronic workbench (EWB) is used to simulate the designed, structures and results shows a good agreement with that specified.

Noise analysis using (EWB) result a minimum noise figure of a value (0.0106 db), minimum resultant chip area required has a value of (46 jam) and the value of gain is (190 dB) for inductive source degeneration and for the common gate design the noise figure equal (0.25 dB), minimum resultant chip area required has a value of (125 jam2) and the value of gain is (126 dB).

Main Subjects

Telecommunications Engineering

Topics

• Simulation methods
• Amplifiers

• APA
• MLA
• AMA

Language

English

Data Type

Arab Theses

Record ID

BIM-305588