Parametric Yield-Driven Resource Binding in High-Level Synthesis with Multi-VthVdd Library and Device Sizing

Joint Authors

Takach, Andres
Xie, Yuan
Wang, Yu
Chen, Yibo

Source

Journal of Electrical and Computer Engineering

Issue

Vol. 2012, Issue 2012 (31 Dec. 2012), pp.1-14, 14 p.

Publisher

Hindawi Publishing Corporation

Publication Date

2012-05-14

Country of Publication

Egypt

No. of Pages

14

Main Subjects

Engineering Sciences and Information Technology
Information Technology and Computer Science

Abstract EN

The ever-increasing chip power dissipation in SoCs has imposed great challenges on today’s circuit design.

It has been shown that multiple threshold and supply voltages assignment (multi-Vth/Vdd) is an effective way to reduce power dissipation.

However, most of the prior multi-Vth/Vdd optimizations are performed under deterministic conditions.

With the increasing process variability that has significant impact on both the power dissipation and performance of circuit designs, it is necessary to employ statistical approaches in analysis and optimizations for low power.

This paper studies the impact of process variations on the multi-Vth/Vdd technique at the behavioral synthesis level.

A multi-Vth/Vdd resource library is characterized for delay and power variations at different voltage combinations.

Meanwhile, device sizing is performed on the resources in the library to mitigate the impact of variation, and to enlarge the design space for better quality of the design choice.

A parametric yield-driven resource binding algorithm is then proposed, which uses the characterized power and delay distributions and efficiently maximizes power yield under a timing yield constraint.

During the resource binding process, voltage level converters are inserted between resources when required.

Experimental results show that significant power reduction can be achieved with the proposed variation-aware framework, compared with traditional worstcase based deterministic approaches.

American Psychological Association (APA)

Chen, Yibo& Wang, Yu& Xie, Yuan& Takach, Andres. 2012. Parametric Yield-Driven Resource Binding in High-Level Synthesis with Multi-VthVdd Library and Device Sizing. Journal of Electrical and Computer Engineering،Vol. 2012, no. 2012, pp.1-14.
https://search.emarefa.net/detail/BIM-446751

Modern Language Association (MLA)

Chen, Yibo…[et al.]. Parametric Yield-Driven Resource Binding in High-Level Synthesis with Multi-VthVdd Library and Device Sizing. Journal of Electrical and Computer Engineering No. 2012 (2012), pp.1-14.
https://search.emarefa.net/detail/BIM-446751

American Medical Association (AMA)

Chen, Yibo& Wang, Yu& Xie, Yuan& Takach, Andres. Parametric Yield-Driven Resource Binding in High-Level Synthesis with Multi-VthVdd Library and Device Sizing. Journal of Electrical and Computer Engineering. 2012. Vol. 2012, no. 2012, pp.1-14.
https://search.emarefa.net/detail/BIM-446751

Data Type

Journal Articles

Language

English

Notes

Includes bibliographical references

Record ID

BIM-446751