Analysis of Leakage Reduction Techniques in Independent-Gate DG FinFET SRAM Cell
Joint Authors
Khandelwal, Saurabh
Sikarwar, Vandna
Akashe, Shyam
Source
Chinese Journal of Engineering
Issue
Vol. 2013, Issue 2013 (31 Dec. 2013), pp.1-8, 8 p.
Publisher
Hindawi Publishing Corporation
Publication Date
2013-09-02
Country of Publication
Egypt
No. of Pages
8
Main Subjects
Engineering Sciences and Information Technology
Abstract EN
Scaling of devices in bulk CMOS technology leads to short-channel effects and increase in leakage.
Static random access memory (SRAM) is expected to occupy 90% of the area of SoC.
Since leakage becomes the major factor in SRAM cell, it is implemented using FinFET.
Further, double-gate FinFET devices became a better choice for deep submicron technologies.
With this consideration in our research work, 6T SRAM cell is implemented using independent-gate DG FinFET in which both the opposite sides of gates are controlled independently which provides better scalability to the SRAM cell.
The device is implemented using different leakage reduction techniques such as gated-Vdd technique and multithreshold voltage technique to reduce leakage.
Therefore, power consumption in the SRAM cell is reduced and provides better performance.
Independent-gate FinFET SRAM cell using various leakage reduction techniques has been simulated using Cadence virtuoso tool in 45 nm technology.
American Psychological Association (APA)
Sikarwar, Vandna& Khandelwal, Saurabh& Akashe, Shyam. 2013. Analysis of Leakage Reduction Techniques in Independent-Gate DG FinFET SRAM Cell. Chinese Journal of Engineering،Vol. 2013, no. 2013, pp.1-8.
https://search.emarefa.net/detail/BIM-494759
Modern Language Association (MLA)
Sikarwar, Vandna…[et al.]. Analysis of Leakage Reduction Techniques in Independent-Gate DG FinFET SRAM Cell. Chinese Journal of Engineering No. 2013 (2013), pp.1-8.
https://search.emarefa.net/detail/BIM-494759
American Medical Association (AMA)
Sikarwar, Vandna& Khandelwal, Saurabh& Akashe, Shyam. Analysis of Leakage Reduction Techniques in Independent-Gate DG FinFET SRAM Cell. Chinese Journal of Engineering. 2013. Vol. 2013, no. 2013, pp.1-8.
https://search.emarefa.net/detail/BIM-494759
Data Type
Journal Articles
Language
English
Notes
Includes bibliographical references
Record ID
BIM-494759