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Engineering Sciences and Information Technology
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Hindawi Publishing Corporation Cairo, Egypt :
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Journal Articles
A Cost-Effective 10-Bit DA Converter for Digital-Input MOEMS Micromirror Actuation
By: Saponara, Sergio; Fanucci, Luca; Gupta, Amit Kumar…[et al.]. VLSI Design. No. 2010 (2010), pp.1-7, 7 p.
Journal Articles
Selected Papers from the Midwest Symposium on Circuits and Systems
By: Peterson, Gregory D.; Farquhar, Ethan; Blalock, Benjamin J.. VLSI Design. No. 2010 (2010), pp.1-2, 2 p.
Journal Articles
An Approach for Implementing State Machines with Online Testability
By: Lala, Parag K.; Parkerson, J. P.; Parekhji, Rubin…[et al.]. VLSI Design. No. 2010 (2010), pp.1-7, 7 p.
Journal Articles
Simple Exact Algorithm for Transistor Sizing of Low-Power High-Speed Arithmetic Circuits
By: Bahrebar, Poona; Navi, Keivan; Iravani, Vaez…[et al.]. VLSI Design. No. 2010 (2010), pp.1-17, 17 p.
Journal Articles
CORDIC Architectures : A Survey
By: Lakshmi, B.; Dhar, A. S.; Choi, Kiyoung. VLSI Design. No. 2010 (2010), pp.1-19, 19 p.
Journal Articles
Run-Length-Based Test Data Compression Techniques : How Far from Entropy and Power Bounds?—A Survey
By: Mehta, Usha S.; Dasgupta, Kankar S.; Devashrayee, Niranjan M.…[et al.]. VLSI Design. No. 2010 (2010), pp.1-9, 9 p.
Journal Articles
Nonlinear Circuit Analysis via Perturbation Methods and Hardware Prototyping
By: Odame, K.; Hasler, P. E.; Blalock, Benjamin J.. VLSI Design. No. 2010 (2010), pp.1-8, 8 p.
Journal Articles
FPGA Implementation of an Amplitude-Modulated Continuous-Wave Ultrasonic Ranger Using Restructured Phase-Locking Scheme
By: Sumathi, P.; Janakiraman, P. A.; Farquhar, Ethan. VLSI Design. No. 2010 (2010), pp.1-11, 11 p.
Journal Articles
Linearity Analysis on a Series-Split Capacitor Array for High-Speed SAR ADCs
By: Zhu, Yan; Sin, Sai-Weng; Seng-Pan U…[et al.]. VLSI Design. No. 2010 (2010), pp.1-8, 8 p.
Journal Articles
Local Biasing and the Use of Nullator-Norator Pairs in Analog Circuits Designs
By: Hashemian, Reza; Blalock, Benjamin J.. VLSI Design. No. 2010 (2010), pp.1-12, 12 p.
Journal Articles
Dynamic CMOS Load Balancing and Path Oriented in Time Optimization Algorithms to Minimize Delay Uncertainties from Process Variations
By: Yelamarthi, Kumar; Chen, Chien-In Henry; Farquhar, Ethan. VLSI Design. No. 2010 (2010), pp.1-13, 13 p.
Journal Articles
Implementation of Hardware-Accelerated Scalable Parallel Random Number Generators
By: Lee, JunKyu; Peterson, Gregory D.; Farquhar, Ethan…[et al.]. VLSI Design. No. 2010 (2010), pp.1-11, 11 p.
Journal Articles
A Pipelined and Parallel Architecture for Quantum Monte Carlo Simulations on FPGAs
By: Gothandaraman, Akila; Warren, G. Lee; Farquhar, Ethan…[et al.]. VLSI Design. No. 2010 (2010), pp.1-8, 8 p.
Journal Articles
Error Immune Logic for Low-Power Probabilistic Computing
By: Marr, Bo; George, Jason; Hasler, P. E.…[et al.]. VLSI Design. No. 2010 (2010), pp.1-9, 9 p.
Journal Articles
Evolvable Block-Based Neural Network Design for Applications in Dynamic Environments
By: Merchant, Saumil G.; Peterson, Gregory D.; Farquhar, Ethan. VLSI Design. No. 2010 (2010), pp.1-25, 25 p.
Journal Articles
Post-CTS Delay Insertion
By: Lu, Jianchao; Taskin, Baris; Peterson, Gregory D.. VLSI Design. No. 2010 (2010), pp.1-9, 9 p.
Journal Articles
Emerging Carbon Nanotube Electronic Circuits, Modeling, and Performance
By: Xu, Yao; Srivastava, Ashok; Sharma, Ashwani K.…[et al.]. VLSI Design. No. 2010 (2010), pp.1-8, 8 p.
Journal Articles
A SiGe BiCMOS Instrumentation Channel for Extreme Environment Applications
By: Ulaganathan, Chandradevi; Greenwell, Robert L.; Berger, Richard W.…[et al.]. VLSI Design. No. 2010 (2010), pp.1-12, 12 p.
Journal Articles
FPGA-Based Software Implementation of Series Harmonic Compensation for Single Phase Inverters
By: Selvajyothi, K.; Janakiraman, P. A.; Peterson, Gregory D.. VLSI Design. No. 2010 (2010), pp.1-14, 14 p.
Journal Articles
A Low-Power Digitally Controlled Oscillator for All Digital Phase-Locked Loops
By: Zhao, Jun; Kim, Yong-Bin; Peterson, Gregory D.. VLSI Design. No. 2010 (2010), pp.1-11, 11 p.